Nand (And Not) - Siemens LOGO! 24RC Manual

LOGO! Functions
Timing diagram for AND with RLO edge detection
1
2
3
Q
Cycle

4.2.3 NAND (AND Not)

The parallel connection of a number
of normally closed contacts is repre-
sented in a circuit diagram as follows:
The output of NAND only adopts the state 0 if all the inputs
have the state 1 (i.e. they are closed).
If an input pin of this block is not wired (x), then the follow-
ing applies to the input: x = 1.
Logic table for NAND
1
0
0
0
0
1
1
1
1
68
1 2 3 4 5 6
2 3 Q
0 0 1
0 1 1
1 0 1
1 1 1
0 0 1
0 1 1
1 0 1
1 1 0
7 8 9 10
Symbol in LOGO!:
LOGO! Manual
A5E00067781 01