Sharp SL-5500 Service Manual page 30

3. ABOUT THE SYSTEM OF SL-5500
3-1. SYSTEM OUTLINE
Item
CPU SA1110 Rev.B4
nCS0 3 16MB
ROMP capacity
(x32 bus fixed)
nCS1 3 Not Use
nCS2 3 Not Use
nCS3 3 Not Use
PC slot A 3 CF
NCS4 3 GA/CF_GA
NCS5 3 Not Use
nMCS0 3 64MB
RAM capacity
(SDRAM)
nMCS1 3 Not Use
nMCS 3 Not Use
Optical communication IrDA1.2 (115kbps)
Sharp:GP2W0110YP
USB (slave only) USB1.1 (16-pin connector)
Touch panel Resistance sheet type
LCD HR-TFT
320 x 240 dots
SD card Yes
Type ΙΙ
CF card
F/L brightness control Front CCFL
function
Duty light control/VR (current) light control
AUDIO Sounder & earphone jack
DAC:PCM1741
AMP:NJM2172
Analog TC35143AF
16-pin connector Charger power supply
USB (Function)
Serial & JTAG (switchable)
3-3. SERIAL CONTROL
The 16-pin connector has two modes: serial and JTAG. The two modes can be switched over using the pin 13.
Pin assignment of 16 pins
1 2 3
13pin PWR PWR TXD
L
• When the pin 13 is at LOW, the connector operates in the serial
mode.
• Wakeup from 16-pin serial
Wakeup can be performed using the signal from the pin 10 of the 16-
pin connector.
This causes an event at CPU-GP24 when SW at the cradle is
pressed. (Active LOW)
SL-5500
4 5 6 7
RXD RTS CTS DSR
SL-5500 HARDWARE DESCRIPTION
3-2. AUDIO CONTROL
CPU
GA
CLK64fs
CLK64fs
MCLK
SCLK
SCLK
SCK
SFRM SFRM
LRCLK
SDOUT
DAC M62332FP
At this time, the clock signal inputted into GPIO19 is used as the syn-
chronous clock signal.
DAC is controlled using GPIO of GA.
/ML :PCM_SLOAD (GPIO12)
MC :PCM_SCK (GPIO11)
MD :PCM_SDATA (GPIO10)
GA
ML
GPIO12
MC
GPIO11
MD
GPIO10
8 9 10 11
GND USB WU VCC
D+ 3.3V
– 29 –
PC-UM10M
AMP
DAC
XTI
BCKIN L
LRCIN R
DIN
MUTEcontrol
VR
DAC
ML
/ML
MC
MC
MD
MD
12 13 14 15
USB TRST DTR PWR
D–
JACK
LSB
16
PWR