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Related Manuals for Arbor Technology EmModule-621E
Summary of Contents for Arbor Technology EmModule-621E
- Page 1 EmModule-621E PC/104 CPU Module User’s Manual Version 1.0 2009.11...
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Page 3: Table Of Contents
Index Table of Contents Chapter 1 - Introduction ............1 1.1 Copyright Notice ............. 1.2 About User’s Manual ............. 1.3 Warning ................1.4 Replacing the lithium battery ........1.5 Technical Support ............1.6 Warranty ................1.7 Packing List ..............1.8 Ordering Information ............. - Page 4 Index CON1: RS-422/ 485 Output Connector ....21 LCD1: TTL LCD Connector ........22 COM1/ COM2: Serial Port Connectors ....22 CFD1: CompactFlash Type II Socket .....23 2.3 The Installation Paths of CD Driver ......Chapter 3 - BIOS ..............25 3.1 BIOS Introduction ............
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Page 5: Chapter 1 Introduction
Introduction Chapter 1 Introduction Chapter 1 - Introduction - 1 -... -
Page 6: Copyright Notice
Introduction 1.1 Copyright Notice All Rights Reserved. The information in this document is subject to change without prior notice in order to improve the reliability, design and function. It does not represent a commitment on the part of the manufacturer. Under no circumstances will the manufacturer be liable for any direct, indirect, special, incidental, or consequential damages arising from the use or inability to use the product or documentation, even if advised of the possibility of such... -
Page 7: Replacing The Lithium Battery
Introduction 1.4 Replacing the lithium battery Incorrect replacement of the lithium battery may lead to a risk of explosion. The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. Do not throw lithium batteries into the trash-can. It must be disposed of in accordance with local regulations concerning special waste. -
Page 8: Warranty
Introduction 1.6 Warranty This product is warranted to be in good working order for a period of two years from the date of purchase. Should this product fail to be in good working order at any time during this period, we will, at our option, replace or repair it at no additional charge except as set forth in the following terms. -
Page 9: Packing List
Introduction 1.7 Packing List 1 x EmModule-621E PC/104 CPU module 1 x Driver CD 1 x Quick Installation Guide If any of the above items is damaged or missing, contact your vendor immediately. 1.8 Ordering Information EmModule-621E AMD Geode™ LX800 PC/104 CPU Module... -
Page 10: Specifications
Introduction 1.9 Specifications Form Factor PC/104 CPU module Processor AMD Geode™ LX800 Cache 64K L1 cache and 128K L2 cache Chipset AMD LX800 + CS36 1 x 200-pin DDR SO-DIMM Socket up to 1GB System Memory SDRAM AMD Geode LX series CPU integrated VGA VGA/ LCD Controller controller with 2D Engine (Shared memory Max. -
Page 11: Board Dimensions
Introduction 1.10 Board Dimensions Unit:mm - 7 -... - Page 12 Introduction Unit:mm - 8 -...
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Page 13: Chapter 2 Installation
Installation Chapter 2 Installation Chapter 2 - Installation - 9 -... -
Page 14: Block Diagrams
Installation 2.1 Block Diagrams Analog R.G.B. AMD Geode 1 x 200-pin Memory Bus LX800 CPU SO-DIMM Socket TTL 18/24-bit 500MHz PCI Bus ITE8888 PCI Bus ISA Bus PC/104 PCI to ISA Bridge RTL8100CL 10/100Mbps PCI Bus LAN PH PCI LAN Controller USB I/F 2 x USB... -
Page 15: Jumpers And Connectors
Installation 2.2 Jumpers and Connectors LCD1 COM2 COM1 CON1 KBM1 LAN1 CFD1 (Bottom side) LPT1 IDE1 FDD1 JBAT1 USB1 PWR1 PC/104 JRS1 VGA1 JFRT1 LLED1 - 11 -... - Page 16 Installation Jumper / Connector Quick Reference Jumpers Label Function JRS1 COM2 RS-232/422/48 Selection JBAT1 Clear CMOS Setting Connectors CFD1 CompactFlash Type II Socket COM1 ~ COM2 Serial Port Connectors CON1 RS-422/48 Connector DIMM1 200-pin DDR SO-DIMM Socket FDD1 Floppy Disk Drive Connector IDE1 Primary IDE Connector Infrared (IR) Connector...
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Page 17: Jumpers
Installation Jumpers JRS1: COM2 RS-232/422/485 Selection (6) The onboard COM2 port can be configured to operate in RS-422 or RS-485 modes. RS-422 modes differ in the way RX/TX is being handled. Jumper JRS1 switches between RS-232 or RS-422/48 mode. When JRS1 is set to RS-422 or RS-48 mode, there will be only +12V output let while JRS1 is set. -
Page 18: Jbat1: Clear Cmos Setting
Installation JBAT1: Clear CMOS Setting (13) If the board refuses to boot due to inappropriate CMOS settings here is how to proceed to clear (reset) the CMOS to its default values. Connector type: 2.00 mm pitch 1x3-pin headers Mode Keep CMOS (Default) Clear CMOS You may need to clear the CMOS if your system cannot boot up because you forgot your password, the CPU clock setup is incorrect, or the CMOS settings... -
Page 19: Connctors
Installation Connctors KBM1: Keyboard & Mouse Connector (1) Connector type: 2.0mm pitch 1x6-pin wafer connector Description KB_DATA MS_DATA KB_CLK PS2_VCC MS_CLK LAN1: Fast Ethernet Connector (2) Description Description N/C (Key) Connector type: 2.0mm pitch 2x-pin headers - 1 -... -
Page 20: Ide1: Ide Connector
Installation IDE1: 44 pins IDE Connector (3) Connector type: 2.0mm pitch 2x22-pin box headers Description Description RESET# DATA7 DATA8 DATA6 DATA9 DATA DATA10 DATA4 DATA11 DATA3 DATA12 DATA2 DATA13 DATA1 DATA14 DATA0 DATA1 N/C (Key) IO WRITE IO READ IO READY IDESEL DACK IRQ14... -
Page 21: Pc/104: Pc/104 Isa Interface
Installation PC/104: PC/104 ISA Interface (5) Description Description Description Description IOCHCK# MEMCS16# SBHE# RST_DRV IOCS16# LA23 IRQ10 LA22 IRQ9 IRQ11 LA21 IRQ12 LA20 DREQ2 IRQ1 SA19 IRQ14 SA18 0WS# DACK0# SA17 +12V DREQ0 MEMR# IOCHRDY DACK# MEMW# SMEMW# DREQ SA19 SMEMR# DACK6# SA18... -
Page 22: Lled1: Lan Led Indicators
Installation LLED1: LAN LED indicators (7) Connector type: 2.4mm pitch 1x4-pin headers. Description LAN1_ACTIVE- LAN1_ACTIVE+ LAN1_LINK- LAN1_LINK+ JFRT1: Switches and Indicators (8) It provides connectors for system indicators that provides light indication of the computer activities and switches to change the computer status. Connector type: 2.4mm pitch 1x8-pin headers. -
Page 23: Ir1: Intrared Connector
Installation IR1: Infrared Connector (9) Connector Type: 2.4mm pitch 1x-pin headers Voltage IRRX IRTX VGA1: Analog RGB Connector (10) Connector type: 2.0mm pitch 2x8-pin headers Description Description GREEN BLUE N/C (Key) VDDAT HSYNC VSYNC VDCLK USB1: USB Connector (11) USB1 supports two USB 2.0 w/ 480Mb/s by pin headers Description Description USBD-... -
Page 24: Fdd1: Fdd Connector
Installation FDD1: FDD Connector (12) Connector type: 2.0mm pitch 2x10-pin headers Description Description DRVDEN0 N/C (Key) DRVDEN1 -WDATA -INDEX -WGATE -MOA -TRACK0 -DSB -DSA -RDATA -MOB -HEAD -DIR -DSKCHG -STEP - 20 -... -
Page 25: Lpt1: Parallel Port Connector
Installation LPT1: Parallel Port Connector (14) Connector type: 2.0mm pitch 2x10-pin headers Description Description STROBE PTD0 ERROR PTD1 INIT PTD2 SLIN PTD3 PTD4 PTD GND (Key) PTD6 BUSY PTD7 SELECT CON1: RS-422/ 485 Output Connector (15) Connector type: 2.0mm pitch 1x4-pin wafer connector RS-422 RS-48 Data+... -
Page 26: Lcd1: Ttl Lcd Connector
Installation LCD1: TTL LCD Connector (16) Connector type: DF-13-40DP-1.2V Description Description VDD VDD VDD3 VDD3 Vcon (N.C.) LPD1 LPD0 LPD3 LPD2 LPD LPD4 LPD7 LPD6 LPD9 LPD8 LPD11 LPD10 LPD13 LPD12 LPD1 LPD14 LPD17 LPD16 LPD19 LPD18 LPD21 LPD20 LPD23 LPD22 FP_VS DOTCLK... -
Page 27: Cfd1: Compactflash Type Ii Socket
Installation CFD1: CompactFlash Type II Socket CFD1 does not support hot swap. Description Description DATA3 DATA11 DATA4 DATA12 DATA DATA13 DATA6 DATA14 DATA7 DATA1 CS#1 CD#3 IO READ IO WRITE IRQ14 CSEL IDE RESET DRDY ADDR2 DREQ ADDR1 DACK ADDR0 DASP DATA0 DIAG... -
Page 28: The Installation Paths Of Cd Driver
Installation 2.3 The Installation Paths of CD Driver Driver Path CHIPSET \Chiset\AMD\LX \ISA\ITE8888 \Ethernet\REALTEK\8100C \Graphics\AMD\LX - 24 -... -
Page 29: Chapter 3 - Bios
BIOS Chapter 3 BIOS Chapter 3 - BIOS - 2 -... -
Page 30: Bios Introduction
BIOS 3.1 BIOS Introduction The Award BIOS (Basic Input/Output System) installed in your computer system’s. The BIOS provides for a standard device such as disk drives, serial ports and parallel ports. It also adds password protection as well as special support for detailed fine-tuning of the chipset controlling the entire system. -
Page 31: Standard Cmos Features
BIOS 3.3 Standard CMOS Features “Standard CMOS Features” allows you to record some basic hardware configurations in your computer system and set the system clock and error handling. card already installed working system, will need select this option. You will need to run the Standard CMOS option, however, if you change your system hardware configurations, such as onboard battery fails, or the configuration stored in the CMOS memory was lost or damaged. - Page 32 BIOS IDE Primary HDDs / IDE Secondary HDDs The onboard PCI IDE connectors provide Primary and Secondary channels for connecting up to four IDE hard disks or other IDE devices. Each channel can support up to two hard disks; the first is the “Master” and the second is the “Slave”.
- Page 33 BIOS Halt On This field determines whether or not the system will halt if an error is detected during power up. All errors (default) Whenever the BIOS detects a non-fatal error, the system will stop and you will be prompted. No errors The system boot will not be halted for any error that may be detected.
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Page 34: Advanced Bios Features
BIOS 3.4 Advanced BIOS Features Quick Power On Self Test When enabled, this field speeds up the Power On Self Test (POST) after the system is turned on. If it is set to Enabled, BIOS will skip some items. Setting: Enabled (Default), Disabled. First/ Second Boot Device These fields determine the drive that the system searches first for an operating system. - Page 35 BIOS Boot Up NumLock Status It allows you to activate the NumLock function after you power up the system. Setting: On (Default), Off. Security Option It allows you to limit access to the System and Setup. When you select System, the system prompts for the User Password every time you boot up.
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Page 36: Advanced Chipset Features
BIOS 3.5 Advanced Chipset Features CAS Latency Time It allows CAS latency time in HCLKs as 2 or 2.. The system board designer should set the values in this field, depending on the DRAM installed. Do not change the values in this field unless you change specifications of the installed DRAM or CPU. - Page 37 BIOS XOR MB0 Setting: Disabled (Default), Enabled. XOR Bit Select Setting: 18 (Default), 19, 20, 21. Video Memory Size In order to determine how much memory is allocated to the video graphics device. Setting: None, 8M (Default), 16M, 32M, 64M, 128M, 24M. Output display In order to specify the display devices the system is connected to.
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Page 38: Integrated Peripherals
BIOS 3.6 Integrated Peripherals OnChip IDE Devicev >>> On-Chip IDE Channel 1 The integrated peripheral controller contains an IDE interface with support for two IDE channels. Select Enabled to activate each channel separately. Setting: Disabled, Enabled (Default). - 34 -... - Page 39 BIOS IDE Primary Master/Slave PIO It allows your system HDD controller to run faster. Rather than having the BIOS issue with a series of commands that transferring to or from the disk drive, PIO (Programmed Input/Output) allows the BIOS to communicate with the controller and CPU directly. When Auto is selected, the BIOS will select the best available mode.
- Page 40 BIOS SuperIO Device >>> Onboard FDC Controller Select “Enabled” if you wish to use it. Select “Disabled” if you don’t wish to use it. Setting: Disabled, Enabled (Default). Serial/ Onboard Parallel Port It allows you to select the onboard serial and parallel ports with their addresses.
- Page 41 BIOS UR2 Duplex Mode Setting: Full, Half (Default). Use IR Pins Setting: RxD2,TxD2 , IR-Rx2Tx2 (Default). Parallel Port Mode Setting: SPP (Default) ECP+EPP Normal EPP Mode Select Setting: EPP1.9, EPP1.7 (Default) ECP Mode Use DMA Setting: 1, 3 (Default). - 37 -...
- Page 42 BIOS IT8888 ISA Decode IO >>> It allows you to use the IT8888 ISA Decode IO menu to set the IO memory range for the onboard ISA. Decode I/O Space 0/ 1/ 2/ 3/ 4/ 5 It allows you to allocate system resources to the ISA bridge and to enable the function correctly.
- Page 43 BIOS Decode I/O Address 0/ 1/ 2/ 3/ 4/ 5 [15:4] It allows you to allocate an address to the ISA bus. The address may range from 0001 to 0FFF. Decode I/O Size 0/ 1/ 2/ 3/ 4/ 5 It allows you to specify the size of the ISA bus. Setting: 1 Byte, 2 Bytes, 4 Bytes, 8 Bytes, 16 Bytes, 32 Bytes, 64 Bytes, 128 Bytes.
- Page 44 BIOS Decode Memory Speed 0/ 1/ 2/ 3 It allows you to specify the memory speed of the ISA bus. Setting: Subtractive Speed, Slow Speed, Medium Speed, Fast Speed. Decode Memory Addr. 0/ 1/ 2/ 3 [23: It allows you to allocate a memory address to the ISA bus. The address may range from 0001 to 0FFF.
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Page 45: Pnp/Pci Configurations
BIOS 3.7 PNP/PCI Configurations PNP OS Installed It allows you to enable the PNP OS Install option if it is supported by the OS installed. Setting: No (Default), Yes. Reset Configuration Data It allows you to determine whether to reset the configuration data or not. Setting: Disabled (Default), Enabled. - Page 46 BIOS IRQ Resources It allows you to configure the IRQ / DMA Resources. Memory Resources It allows you to configure the Memory Resources. PCI/VGA Palette Snoop Some non-standard VGA display cards may not show colors properly. It allows you to set whether or not MPEG ISA/VESA VGA cards can display with PCI/VGA.
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Page 47: Pc Health Status
BIOS 3.8 PC Health Status Current CPU Temperature CPU/ MEM VCore VCC3/ +5V/ +12V/ VBAT(V)/ 5VSB - 43 -... -
Page 48: Load Optimized Defaults
BIOS 3.9 Load Optimized Defaults It allows you to load the default values to your system configuration. The default setting is optimal and enabled all high performance features. - 44 -... -
Page 49: Set Password
BIOS 3.10 Set Password Using Password to set a password that will be used exclusively on the system. To specify a password, highlight the type you want and press <Enter>. The Enter Password: message prompts on the screen. Type the password, up to eight characters in length, and press <Enter>. -
Page 50: Save & Exit Setup
BIOS 3.11 Save & Exit Setup Typing “Y”, you will quit the setup utility and save all the changes into the CMOS memory. Typing “N”, you will return to Setup utility. - 46 -... -
Page 51: Exit Without Saving
BIOS 3.12 Exit Without Saving Typing “Y” will quit the Setup utility without saving the modifications. Typing “N” will return you to Setup utility. - 47 -... -
Page 52: Bios Memory Mapping
BIOS 3.13 BIOS memory mapping Address Device Description E000:0000h - F000:FFFFh System BIOS Area D000:2000h - D000:FFFFh Free space D000:0000h - D000:1FFFh LAN ROM C000:E000h - CF00:FFFFh Free space C000:0000h - C000:DFFFh VGA BIOS A000:0000h - B000:FFFFh VGA RAM 0000:0000h - 9000:FFFFh DOS 640K - 48 -... -
Page 53: Award Bios Post Codes
BIOS 3.14 Award BIOS POST Codes CFh Test CMOS read/write functionality Early chipset initialization: Disable shadow RAM, L2 cache (socket 7 and below), program basic chipset registers C1h Detect memory: Auto detection of DRAM size, type and ECC, auto detection of L2 cache (socket 7 and below) C3h Expand compressed BIOS code to DRAM Ch Call chipset hook to copy BIOS back to E000 &... - Page 54 BIOS Reserved HPM initialization (notebook platform) Reserved Check validity of RTC value; Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead; Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD's legacy information;...
- Page 55 BIOS Initialize EISA slot Reserved Calculate total memory by testing the last double last word of each 64K page; Program writes allocation for AMD K CPU Reserved Reserved 4Ch Reserved 4Dh Reserved Program MTRR of M1 CPU; initialize L2 cache for P6 class CPU & program cacheable range;...
- Page 56 BIOS Reserved Reserved Reserved Enter AWDFLASH.EXE if: AWDFLASH.EXE is found in floppy dive and ALT+F2 is pressed Reserved Detect and install all IDE devices: HDD, LS120, ZIP, CDROM... Reserved Detect serial ports and parallel ports Reserved Reserved Detect and install coprocessor Reserved 7Ch Reserved 7Dh Reserved...
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Page 57: Chapter 4 Appendix
Appendix Chapter 4 Appendix Chapter 4 - Appendix - 3 -... -
Page 58: I/O Port Address Map
Appendix 4.1 I/O Port Address Map Each peripheral device in the system is assigned a set of I/O port addresses which also becomes the identity of the device. The following table lists the I/O port addresses used. Address Device Description 00000022 - 0000003F PCI bus 00000044 - 00000047... -
Page 59: Interrupt Request Lines (Irq)
Appendix 000003F8 - 000003FF Communications Port 00000778 - 0000077B Printer Port 00000A79 - 00000A79 ISAPNP Read Data Port 00000D00 - 0000FFFF PCI Bus 0000FC00 - 0000FCFF Realtek RTL8139/810x family Fast Ethernet NIC 0000FF00 - 0000FF0F Standard Dual Channel PCI IDE Controller 4.2 Interrupt Request Lines (IRQ) Peripheral devices use interrupt request lines to notify CPU for the service required. -
Page 60: Memory Address Map
Appendix 4.4 Memory Address Map Address Device Description EE000000 - EEFFFFFF Standard Floppy Disk Controller EFFE8000 - EFFEBFFF AMD Win 2K/XP Graphics Driver EFFEC000 - EFFEFFFF AMD Win 2K/XP Graphics Driver EFFF0000 - EFFF3FFF AMD Win 2K/XP Graphics Driver EFFF4000 - EFFF7FFF Geode LX AES Crypto Driver EFFF8000 - EFFFBFFF AMD Win 2K/XP Graphics Driver... -
Page 61: Watchdog Timer (Wdt) Setting
Appendix 4.5 Watchdog Timer (WDT) Setting WDT is widely used for industry application to monitoring the activity of CPU. Application software depends on its requirement to trigger WDT with adequate timer setting. Before WDT time out, the functional normal system will reload the WDT. - Page 62 Appendix AX, 2Eh DX, AX AL, 0F0h DX, AL ; select CRF0 AL, 00h DX, AL ; set CRF0=00h, output AX, 2Eh DX, AX AL, 0Fh DX, AL ; select CRF, WDT Timer unit AL, 00h ; bit2 =0 ->second ; bit2 =1 -> minute DX, AL ;...
- Page 63 Appendix C language Code /*----- Include Header Area -----*/ #include "math.h" #include "stdio.h" #include "dos.h" /*----- routing, sub-routing -----*/ void main() outportb(0x2e, 0x87); /* initial IO port twice */ outportb(0x2e, 0x87); outportb(0x2e, 0x2B); /* select CR2B */ outportb(0x2e+1, 0x00); /* update CR2B bit4 to 00h */ /* Set PIN89 as WDTO */ outportb(0x2e, 0x07);...
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