Table of Contents Revision History ....................1 Introduction......................1 1. Specifications......................2 2. Overview........................ 3 2.1. Name of Parts ....................3 2.2. Block Diagram ....................4 2.3. Power Supply ..................... 4 2.4. JTAG Connector....................5 3. Jumper Pins......................5 3.1. Configuration Pin ....................5 4.
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HuMANDATA will revise the diagram. When a problem can be solved only by replacing components or modifying the product, HuMANDATA will take back the product to replace it with a properly functioning product.
Initial release Introduction Thank you for buying our product XCM-005. This is an evaluation board equipped with a Xilinx FPGA Spartan-3, power, reset, and clock circuit and configuration device. It can provide you with very convenient and easy-to-use environment. XCM-005 Series v1.0...
2. Overview 2.1. Name of Parts User I/Os (CN1) JTAG Power & POR Config. Device FPGA Oscillator 48 MHz Oscillator 18.432 MHz User I/Os (CN2) Component Side *XCM-005-1500/2000 XCM-005 Series v1.0...
2.4. JTAG Connector This connector is used to configure the FPGA and program the configuration device in-system. Pin assignment is as follows. Signal Name JTAG Pin Signal Name VCC (3.3V) You can use Xilinx download cable. Notice Please pay attention not to attach cables in reverse. 3.
4. FPGA Configuration To configure the FPGA via JTAG, please refer to the following steps. 1. Double-click [Configuration Target Device] in [Processes] tab. 2. Select [Configure devices using Boundary-Scan (JTAG)]. 3. Open the bit file you made. 4. Confirm [Verify] is not checked in [Device Programming Properties] dialog. 5.
6. Additional Documentation and User Support The following documents and other supports are available at http://www.hdl.co.jp/en/spc/XCM/xcm-005/ Circuit Schematic Pin List Dimensional drawing PCB drawing Net List … and more. XCM-005 Series v1.0...