Locating The I/O Connection Points On The Board - Keithley KPCI-PIO96 User Manual

Parallel digital i/o board
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KPCI-PIO96 User's Manual

Locating the I/O connection points on the board

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The board has four identical I/O connectors: one for each group of PA, PB and PC ports (i.e one
connector for each emulated 8255 chip). Each I/O connector has a 50-pin, 0.1" header
configuration. This configuration allows placing a ground wire between each I/O conductor in
the cable, which assures maximum shielding and minimum crosstalk. See Figures 3-1 and 3-2:
Figure 3-1 and Table 3-1 define and describe defines the pin assignments for each of the four
identical I/O connectors.
Figure 3-2 shows the board location of each I/O connector and the group of PA, PB, and PC
ports to which it connects.
Figure 3-1
Pin assignments for I/O connectors (J102 through J105)
01
02
PA7
04
03
PA6
06
05
PA5
08
07
PA4
10
09
PA3
12
11
PA2
13
14
PA1
15
16
PA0
17
18
PC7
19
20
PC6
22
21
PC5
24
23
PC4
26
25
PC3
27
28
PC2
29
30
PC1
31
32
PC0
33
34
PB7
36
35
PB6
38
37
PB5
40
39
PB4
42
41
PB3
43
44
PB2
45
46
PB1
47
48
PB0
49
50
+5V
Mating connector is part number 3M 3425-6050
Signal Ground
Installation
3-5

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