Analog Devices MAX98365A Manual page 4

MAX98365 Evaluation Systems
Gain and Channel Selection
2
(I S/Left-Justified Mode)
The MAX98365's GAIN_SLOT pin is connected to the
center pin (pin 1) of the J7 header. When operating the
2
device in I S or left-justified mode, shunting pin 1 to the
adjacent pins of the J7 header controls the PCM gain.
Table 4 shows the available gain settings in I
justified modes.
2
In I S and left-justified modes, channel selection is con-
trolled by placing three shunts across the DAI configura-
tion headers J3, J4, or J5. Each of the DAI configuration
headers represent one valid mapping of the DAI pins to
the PCM input signals. See
settings for the DAI configuration headers. Only one DAI
configuration may be used at a time.
shunt positions used for DAI configuration A.
Channel Selection (TDM Mode)
In TDM mode, the MAX98365 has a fixed gain of 21.5dB
and the GAIN_SLOT pin becomes repurposed for TDM
channel selection. The MAX98365 accepts 8-channel
TDM data with either 16-bit or 32-bit data. The GAIN_
SLOT pin and DAI configuration are used to select which
of the 8 channels of TDM data the part responds to, as
shown in Table 6.
Table 4. J7 Jumper Selection
(GAIN_SLOT)
GAIN (dB)
21.5
18.5
15.5
12.5
9.5
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Table 5 for the valid jumper
Figure 3
J7 SHUNT
GAIN_SLOT
POSITION
1-5 Connected to GND
Not Installed Unconnected
1-3 Connected to VDD
Connected to VDD through
1-2
100kΩ resistor R1
Connected to GND through
1-4
100kΩ resistor R2
Evaluates: MAX98365A/MAX98365B/
Table 5. J3-J5 Header Selection
(DAI Configuration)
2
I S/LJ CHANNEL
Left
2
S and left-
Right
Mono-mix
(Left/2 + Right/2)
shows the
Figure 3. DAI Configuration A (Left-Channel for I 2 S/Left-
Justified Operation)
MAX98365C/MAX98365D
SHUNT DAI
HEADER CONFIGURATION
J3
J4
J5
Analog Devices │ 4
A
B
C