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2205 System Technical and User's Guide
5. Connector/Internal Cable Configuration
A typical electronics block diagram is provided in drawing 0021984 where it identifies the internal
cabling and how it relates to the external connectors. The end cap configuration is depicted in Figure 5-1
and in drawing 0021985. Unused connectors are sealed with removeable plugs.
J1
J2
J3
J11
J9
J5
J10
J4
J7
J6
J8
Figure 5-1. End Cap
5.1 J1 Connector – Power, 2x Trigger, 10/100 Ethernet
J1 provides connection for two 36-60Vdc inputs, 2x triggers, and 10/100 Ethernet. The embedded CPU is
shipped with an IP address of 192.9.0.101 and SubNet Mask of 255.255.255.0. This connector's
configuration is provided in Table 5-1. To operate the system as a Side Scan and Sub-Bottom SONAR
processor, 48vdc (nominal) must be applied to both pairs of input power connections. If only Side Scan
will be used, power to pins 1 & 3 is required. Refer to drawing 0022208 for wiring configuration.
0022175
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Rev A
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