Quectel EG915U Series Hardware Design page 42

Table 11: Pin Definition of USB Interface
Pin Name
USB_VBUS
USB_DP
USB_DM
For more details about the USB 2.0 specifications, visit http://www.usb.org/home.
It is recommended to reserve test points for debugging and firmware upgrade in your design. The
following figure shows a reference circuit of USB interface.
Module
USB_VBUS
USB_DM
USB_DP
A common mode choke L1 is recommended to be added in series between the module and your MCU to
suppress EMI spurious transmission. Meanwhile, the 0 Ω resistors (R3 and R4 ) should be added in
series between the module and the test points so as to facilitate debugging, and the resistors are not
mounted by default. To ensure the signal integrity of USB data lines, L1, R3 and R4 must be placed close
to the module, and resistors R3 and R4 should be placed close to each other. The extra stubs of trace
must be as short as possible.
When designing the USB interface, you should follow the following principles to meet USB 2.0
specification.
⚫
Route the USB signal traces as differential pairs with ground surrounded. The impedance of USB
differential trace is 90 Ω.
⚫
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. Route
the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that
EG915U_Series_Hardware_Design
Pin No. I/O
8 AI
9 AIO
10 AIO
Minimize these stubs
R3
R4
USB_VBUS
L1
Close to Module
GND
Figure 18: Reference Circuit of USB Application
Description
USB connection detect
USB differential data (+)
USB differential data (-)
Test Points
NM_0R
NM_0R
ESD Array
LTE Standard Module Series
Comment
Typical 5.0 V
Minimum 3.5 V
USB 2.0 compliant.
Require differential
impedance of 90 Ω.
If unused, keep it open.
MCU
USB_DM
USB_DP
GND
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