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JASMINE-
Subboard
Documentation
©
Fujitsu Microelectronics Europe GmbH
Am Siebenstein 6-10
63303 Dreieich-Buchschlag, Germany

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Summary of Contents for Fujitsu JASMINE

  • Page 1 JASMINE- Subboard Documentation © Fujitsu Microelectronics Europe GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag, Germany...
  • Page 2 History Revision Date Comment V1.0 07.03.01 New Document...
  • Page 3: No Liability For Consequential Damages

    However, this warranty is excluded if the defect has resulted from an accident not attributable to Fujitsu Microelectronics Europe GmbH, or abuse or misapplication attributable to the customer or any other third party not relating to Fujitsu Microelectronics Europe GmbH.
  • Page 4 This Starterkit contains an evaluation board, documentation and software on a CD-ROM. For documentation or software updates, please refer to our web site www.fujitsu-fme.com Fujitsu reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice. 07.03.01 V1.0...
  • Page 5 Introduction The JASMINE-Subboard is a low cost multifunctional evaluation board for Fujitsu graphic device controller Jasmine. It can be used with CREMSON-Starterkit CPU-Modul only for software development and testing as a simple target board. The board allows the designer immediately to start the software development before his own final target system is available.
  • Page 6 JP201 Jasmine 0 Jasmine 1 Mode1-0 Jasmine 2 Jasmine 3 Jasmine can also act as a 16Bit device from MCU’s point of view. The data mode can be set by Jumper JP203. JP203 Description 32 Bit data mode Mode2 16 Bit data mode It is possible to invert the RDY signal (Mode3 = 1).
  • Page 7 Test mode Test Run mode 3.5 Reset Pin (JP212) The Jumper JP212 determines the Jasmine Reset Pin. It can be connected directly with the Reset of the VGC, or with a port of the MCU, to execute a software Reset. JP212...
  • Page 8 3.8 External Clock Input (JP214) JP214 Description ON (closed) NO ext. clock Ext. Clock Can used with a pull-up OFF (open) as ext. Clock 3.9 Video Input Processor (JP308, JP302, JP301, JP305, JP306, JP307) JP308 Description Digital and analog On (closed) Power supply supply voltage for VIC voltage...
  • Page 9 3.10 Header for Debug Signals CCFL Signals (JP208) • CCFL_OFF – CCFL supply control OFF • CCFL_IGNIT – CCFL supply control IGNITION • CCFL_FET2 – CCFL FET driver2 • CCFL_FET1 – CCFL FET driver1 C Signals from SAA7111A (JP211) • C_SCL - Serial clock line •...
  • Page 10 ULB_CS - Chip select • ULB_DREQ - DMA request signal • ULB_DACK - DMA acknowledge signal For more information please look at the Hardware Manual of the Jasmine graphic controller and the Data Sheet of the Video Input Processor SAA7111A.
  • Page 11 Schematics and Drawings...