SOLTEK SL-75KAV User Manual page 61

CPU to PCI Write
PCI Dynamic Bursting When Enabled, every write transaction goes to the
PCI Master 0 WS Write When Enabled, writes to the PCI bus are executed
Memory Parity/ECC
PCI Delay Transaction Leave this field at default
PCI #2 Access #1 Retry Leave this field at default
AGP Master 1 ws write Leave this field at default
AGP Master 1 ws read Leave this field at default
3. Press <ESC> to return to the Main Menu when you finish setting up all
items.
When this field is Enabled, writes from the CPU to
Buffer the PCI bus are buffered, to compensate for the speed
differences between the CPU and the PCI bus. When
Disabled, the writes are not buffered and the CPU
must wait until the write is complete before starting
another write cycle.
The choice: Enabled, Disabled.
write buffer. Burstable transactions then burst on the
PCI bus and nonburstable transactions don't.
The choice: Enabled, Disabled.
with zero wait states.
The choice: Enabled, Disabled.
This item enabled to detect the memory parity and
Check Error Checking & Correcting.
The choice: Enabled, Disabled.
75KAV/75KAV-X
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