Figure 2. Total Reach Dds Circuit Diagram; Figure 3. Option Switch; Table 1. Option Settings - ADTRAN Total Reach DDS-DP 5 Series Installation And Maintenance Manual

Hide thumbs Also See for Total Reach DDS-DP 5 Series:
Table of Contents

Advertisement

Series 5 Total Reach DDS-DP may interoperate over
the carrier system with another Total Reach DDS-DP,
OCU DP, DS0 DP, 1/0 DCS, or switch and may be
located in an end office, hub office, intermediate
office, or Digital Loop Carrier (Figure 2). The
2-wire loop is connected using the odd pair Tip (pin
31) and Ring (pin 32) on the Series 5 backplane.
SLC
SERIES 5
DLC
2-Wire Loop
TR
T-Carrier
DDS-DP
T/R Pair

Figure 2. Total Reach DDS Circuit Diagram

The Series 5 Total Reach DDS-DP must be
used with an appropriate Total Reach
R unit.
Options
The Series 5 Total Reach DDS-DP is provisioned
through the SLC Series 5 system and an on-board DIP
switch. SW2 provides feature options not available
through the SLC Series 5 channel bank intelligent
system. Use the SLC Series 5 Craft Interface Unit (CIU)
to provision intelligent channel bank features supported
by the Series 5 Total Reach DDS-DP. See Figure 3
and Table 1 for option description and provisioning.

Figure 3. Option Switch

Select OCU DP, CLEI 5SCU48, when
provisioning via the CIU.
Error Correction
When error correction is enabled the Series 5 Total Reach
DDS-DP provides an error detection and correction
2
All manuals and user guides at all-guides.com
Customer Premises
4-Wire Customer
Interface
TR
DSU/CSU
DDS-R
NOTE
DDS-
64K
19.2K
SW56
ABSIG
QM
NOTE
Section 61433105L2, Issue 4

Table 1. Option Settings

S
o
t f
w
a
e r
P
o r
v
s i
o i
F
u
n
i t c
n o
R
a
e t
S
l e
c e
2 t
E
r r
r o
C
r o
e r
i t c
n o
f I
a r
e t
E (
) C
M
V
E
C
a
t t
e h
e s
f I
a r
e t
S
C
E
C
t
e h
e s
a r
e Z
o r
C
o
e d
Z (
) C
Y
s e
r o
S
c e
n o
a d
y r
Y
s e
r o
C
a h
n n
l e
S (
) C
H
a
d r
w
a
e r
P
o r
v
s i
o i
4 6
K
S
W
2
1 -
O
N
s
l e
1
9 1
2 .
K
S
W
2
2 -
O
N
s
l e
S
w
t i
h c
d e
6 5
S
W
2
3 -
O
N
e
a n
O
F
F
i d
A
B /
i S
n g
i l a
g n
S
W
2
4 -
O
N
t
e h
A
a
d n
r p
s e
n e
O
F
F
t
e h
t
e h
n i
o c
Q
u
l a
y t i
M
o
t i n
r o
S
W
2
5 -
O
N
e
a n
O
F
F
i d
1
F
r o
9 1
2 .
b k
s p
E
r r
r o
C
r o
e r
n e
b a
e l
9
6 .
M
V
E
C
w
h t i
S
L
capability that maintains data integrity across the carrier
facility. For subrate and 19.2 kbps rates, error correction
and data transmission is accomplished over a single DS0
time slot using a Majority Vote Error Correction
(MVEC) algorithm. For error correction at these rates,
MVEC must be selected in the BCU via the SLC Series 5
CIU.
For rates of 56 and 64 kbps, error correction requires one
additional DS0 time slot for the error correcting parity
byte. The Series 5 Total Reach DDS-DP only allows
SCEC, the parity byte error correction scheme, at 56 and
64 kbps. When error correction is desired for 19.2 kbps
service, provision 9.6 kbps and MVEC via the CIU and
select 19.2 on SW2.
n
n i
g
v
a i
S
r e
e i
s
5
B
C
U
D
s e
r c
p i
i t
n o
4 .
4 ,
8 .
9 ,
, 6 .
r o
6 5
b k
s p
s i
. 2
t 4
r h
u o
h g
9 1
, 2 .
e s
e l
: t c
r o
N
O
N
E
S (
C
E
C
n
t o
v a
l i a
t a r
s e
n o
h t
s i
c
r a
) . d
s i
5
t 6
r h
u o
h g
4 6
k
p b
, s
e s
e l
r o
N
O
N
E
(
M
V
E
C
s i
N
A /
t a
e t
) . s
N
o
N
o
n
n i
g
v
a i
D
p i
S
i w
c t
h
S
W
(
4 6
) K
c e
s t
4 6
b k
s p
C
e l
r a
C
a h
n n
l e
(
9 1
2 .
) K
c e
s t
9 1
2 .
o l
p o
a r
e t
S (
W
5
) 6
l b
s e
S
w
t i
h c
d e
6 5
a s
l b
s e
S
w
t i
h c
d e
6 5
A (
B
I S
) G
u
t i n
e d
r e t
i m
e n
t s
e h
s
a t
e t
o
B
i s
n g
i l a
g n
b
s t i
u
i s
g n
s
g i
a n
o t
t n
e h
c
a h
n n
l e
a b
k n
a b
k c
l p
u
i n
d t
r e
v i
s e
i s
n g
i l a
g n
f
o r
m
i m
g n
a d
a t
r t s
a e
. m
Q (
M
)
l b
s e
Q
M
a s
l b
s e
Q
M
i t c
n o
e s
e l
t c
9 1
2 .
n o
S
W
2
a
C
S
i r e
s e
5
I C
. U
61433105L2-5D
b a
e l
: t c
2
t f
e h
s l
n a
. e
m
d n

Advertisement

Table of Contents
loading

Table of Contents