Figure 6. Slc-5 U-Br1Te Iii Idsl/Dds Circuit Diagram - ADTRAN SLC-5 U-BR1TE III Installation And Maintenance Manual

Figure 6
A
4W DS0 DP
or
1
OCU DP
D4
A
4W DS0 DP
or
2
OCU DP
D4

Figure 6. SLC-5 U-BR1TE III IDSL/DDS Circuit Diagram

61102040L4-5B
B
4W
Digital C
4W DS0 DP
T1
4W DS0-DP
or
or DCS
DCS
COT
D4
Non-ADTRAN U-BR1TE 1B+D
2W
B C
Digital
T1
U-BR1TE U-BR1TE
1B 1B+D
D4 COT
Section 61102040L4-5, Issue 2
SLC 5
2-Wire
D
Local
Loop
T1
U-BR1TE
1B
RT
SW2-
1 - LULT
2 - ADJ
SW1-
1 - B1
2 - OFF
3 - OFF
4 - OFF
5 - PWR
2-Wire
D
Local
Loop
T1
U-BR1TE
1B+D
RT
1102040L4 Equipment Requirements
1
C: Must be 1102040L4 w/ power disabled or 1102040L3
1 D: Must be 1102040L4 w/ power enabled
2
B: Must be 1104020L4 w/ power disabled or 1104020L5,
per RFP# 99-7235-CS
2
C: Must be 1102040L4 w/ power disabled or 1102040L3
2
E: Requires local AC power
2 No SLC 5 U-BR1TEs are used in a non-SLC 5 DLC DDS Application
NOTE: Refer to Table 2 for DIP switch function descriptions.
E
Customer
IDSL OCU-R
Premises
E
Customer
IDSL OCU-R
Premises
7