Evm Digital Interface; J2: Serial Interface Header - Texas Instruments ADS8339EVM-PDK User Manual

EVM Digital Interface

3 EVM Digital Interface
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide convenient 10-pin, dual-
row, header and socket combinations at P1. The header and socket provide access to the ADC digital
control pins. Consult Samtec at
connector options.
Table 2 summarizes the pinouts for digital interface J2.
Pin Number
J2.1
J2.3
J2.7
J2:13
J2.15
J2.17
J2.4, J2.10, and J2.18
J2.16, J2.20
J2.2, J2.5-6, J2.8-9,
J2.11-12, J2.14, and
J2:19
3.1 Serial Interface (SPI)
The ADS8339 ADC uses SPI serial communication to send conversion results to the MMB0 motherboard,
and subsequently, to a computer using universal serial bus (USB). The serial clock signal (SCLK) is
created by the MMB0 motherboard as the SPI host, with a frequency that is programmable up 25-MHz to
obtain the maximum sampling rate of 250-kSPS.
2
3.2 I C Bus for Onboard EEPROM
The ADS8339EVM has an I
EEPROM. The bus is not used in any form by the ADS8339 converter.
6
ADS8339EVM-PDK
www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating
Table 2. J2: Serial Interface Header
Signal
Chip-select input that can be used as a convert
CS or CONVST
start
SCLK Serial clock input
Input used as convert start by the MMB0
CS or CONVST
motherboard
SDO or MISO SDO or MISO output
Interrupt output for detecting end of conversion with
INT
BUSY bit
Direct connection to the convert start pin if JP3 is
CONVST
installed
GND Grounded pins
2
I C bus; used only to program the U4 EEPROM on
2
I C bus
the EVM board
Unused Unused
2
C bus used by the MMB0 motherboard to communicate with the onboard
Copyright © 2014–2015, Texas Instruments Incorporated
Description
SBAU233A – October 2014 – Revised November 2015
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