Quick Reference - Texas Instruments ADS1271EVM-PDK User Manual

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Quick Reference

Table 3 provides a quick summary of the connections required for operation of the EVM as a stand-alone
board.
SPI
Power
Analog Inputs Analog inputs and external reference
SBAU107C – November 2004 – Revised November 2014
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Figure 2. Default Software Screen
Table 3. Critical Connections
Function
SCLK
DIN
DOUT
DRDY/FSYNC
1.8V
3.3V
5.0V
AVDD (EVM supply)
AVSS (EVM supply)
DGND
AGND
Copyright © 2004–2014, Texas Instruments Incorporated
Pin
Header/Pin Description
Name
J2.5 CLKR SPI Serial Clock
J2.13 (Top) DR SPI Data Input to ADC (MOSI)
J2.13 (Bottom) DR SPI Data Output from ADC (MISO)
J2.9 Top FSOUT
SPI new conversion indication (see
Section
J2.9 Bottom FSR
J3.7 +1.8VD 1.8V supply for ADC DVDD (option)
J3.9 +3.3VD 3.3V supply for ADC DVDD (option)
J3.3 +5VA 5.0V supply for ADC AVDD
Positive supply for buffers (+15V)
J3.1 +VA
(only required when using analog buffers)
Negative supply for buffers (-15V)
J3.2 -VA
(only required when using analog buffers)
J3.5 DGND Digital ground from MMB0
J3.6 AGND Analog ground from MMB0
J4/5 Various Analog inputs and external reference to
ADC
ADS1271EVM and ADS1271EVM-PDK User's Guide
Quick Reference
5.6.2)
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