Part 4: Qspi Flash - Alinx AXU2CGA User Manual

PS_DDR4_DQ56
PS_DDR4_DQ57
PS_DDR4_DQ58
PS_DDR4_DQ59
PS_DDR4_DQ60
PS_DDR4_DQ61
PS_DDR4_DQ62
PS_DDR4_DQ63
PS_DDR4_DM4
PS_DDR4_DM5
PS_DDR4_DM6
PS_DDR4_DM7

Part 4: QSPI Flash

The AXU2CGA/B board has a 256MBit Quad-SPI FLASH chip, the model
is MT25QU256ABA1EW9-0SIT. QSPI FLASH is connected to the GPIO port of
BANK500 in the PS part of the ZYNQ chip. Figure 4-1 shows the part of QSPI
Flash in the schematic.
Configure Chip Pin Assignment:
Signal Name
MIO0_QSPI0_SCLK
MIO1_QSPI0_IO1
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ZYNQ Ultrascale + FPGA Board AXU2CGA/B User Manual
PS_DDR_DQ56_504
PS_DDR_DQ57_504
PS_DDR_DQ58_504
PS_DDR_DQ59_504
PS_DDR_DQ60_504
PS_DDR_DQ61_504
PS_DDR_DQ62_504
PS_DDR_DQ63_504
PS_DDR_DM4_504
PS_DDR_DM5_504
PS_DDR_DM6_504
PS_DDR_DM7_504
Figure 4-1: QSPI Flash
Pin Name
PS_MIO0_500
PS_MIO1_500
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J28
K27
H28
H27
G26
G25
K25
J25
R23
H23
L27
H26
Pin Number
AG15
AG16