Analog Devices AD9266 Quick Start User Manual page 15

the VisualAnalog Input Formatter matches the data format selected in the SPIController
ADCBase0 OUTPUT MODE(14) window.
For proper capture, DCO-to-data output timing might need to be adjusted. In the ADCBase0 tab of
SPIController (shown in Figure 9), in the OUTPUT DELAY(17) field, check the DCO DELAY EN box, and
try various output delay settings to see if capture improves.
If the FFT appears normal but the performance is poor, check the following:
That an appropriate filter is used on the analog input.
That the signal generators for the clock and the analog input are clean (low phase noise).
That if noncoherent sampling is being used, change the analog input frequency slightly.
That the SPI configuration file matches the product being evaluated.
If the FFT window remains blank after Run in VisualAnalog (see Figure 12) is clicked, do the following:
Make sure that the evaluation board is securely connected to the
Make sure that the FPGA has been programmed by verifying that the DONE LED is illuminated on
the HSC-ADC-EVALCZ
board is in the correct position for USB CONFIG.
Make sure that the correct FPGA program was installed by clicking the Settings icon in the ADC
Data Capture block in VisualAnalog. Then, select the FPGA tab and verify that the proper FPGA bin
file is selected for the device.
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board. If this LED is not illuminated, make sure that the U4 switch on the
Rev 03 Jun 2015 18:39 | Page 15
HSC-ADC-EVALCZ board.
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