Ifail Adc; Waveform Generator; Tone Generator; Controller Software - ConMed Sabre 2400 Operators & Service Manual

In all modes except a monopolar coag mode, the
signal VDIS will be low, thus forcing U14-10 (an
open collector) to float. When VSENSE exceeds
the voltage at U12-3 by a diode voltage drop,
the VSENSE feedback loop becomes dominant
and turns VBASE down to limit the amount of
RF output voltage. This action occurs primarily
at high power settings of monopolar cut at high
load impedances to prevent unwanted arcing at
the active electrode. When VDIS is high, U14-10
drops and forms a voltage divider through R65
with VSENSE and delays the onset of VBASE
shutback from limiting RF output voltage until
the output voltage is much higher.

3.1.3.6 IFAIL ADC

The current level of the RF amplifier is moni-
tored by U12:C to provide a voltage (ISENSE)
to one channel of the ADC (U16). This value is
compared to an anticipated value for the machine
settings. In the event that this value is exceeded, a
fatal alarm results that produces a "HLP-5" code
and shuts down the Sabre 2400.

3.1.3.7 Waveform Generator

Refer to Schematic 4.4. U27 is a 32 K x 8
EPROM that stores the bit patterns for the wave-
forms that drive the RF power amplifier. The
EPROM is arranged so that the upper address
lines, WV0-7, determine which waveform is
selected by the microprocessor, and the lower
address lines, WVA0-6, determine which byte of
the waveform is selected at a time. The address
counter (U23 and U24) cycles through its count
to sequentially select each byte of the waveform
and to reload its own count modulus at the
beginning of each waveform. The selected byte
of the waveform is then parallel-loaded into shift
register U26, where it is serially-shifted out to the
buffer U22 one bit every 50 nanoseconds. U25 is
configured as a modulus 8 counter that controls
the parallel loading of the shift register U26 and
increments the lower waveform address counter
(U23 & 24). Both the loading and incrementing
occur on the rising edge of the 20 MHz clock
when /SRLOAD (U25-11) goes low and then
high.
U25 also generates 2.5 MHz and 10 MHz clocks
from the 20 MHz oscillator Y1 for clocking the
Display/Keyboard Driver/Encoder U26 and the
microprocessor U3.
Each time /SRLOAD goes low and then high,
the waveform address counter formed by U23
and U24 advances its count. The outputs from
this counter (WVA0-6) select the next 8 bit word
to be loaded into U26 from U27. When the
waveform address counter reaches it full count,
i.e., the entire waveform has been completely
output, /CNTRLD goes low on the next count
and the address counter is preloaded to the pat-
tern presented to it by O0-O6 of U27. This
pattern sets the modulus of the address counter
and thus the length of the waveform bit pattern.
/CNTRLD also clears the shift register U26 to
zeros to prevent putting the modulus pattern out
to the power amplifier. Since /CNTRLD (TP14)
is low only at the beginning of a waveform, it is
an excellent point to use for a scope trigger when
examining waveforms. See Figure 3.2 for repre-
sentative waveforms.
U22 provides both buffer and enable functions
for the waveform generator.

3.1.3.8 Tone Generator

The tone frequency generator is located within
PIA U10 which produces a square wave at U10-
6 (SPKR). This signal is buffered by U14:B and
provides the sink side of the speaker drive. The
source side of the drive is a DC voltage controlled
by one section of the Quad DAC U11 and power
amp U12:B with Q3. Controlling the level of this
DC voltage thereby sets the tone volume. A2Q2
that can be controlled by the base voltage.

3.1.4 Controller Software

The behavior of the Controller is a function of
the custom program residing in the 27C256
EPROM memory. Since the 27C256 is a device
with a custom program, it must only be replaced
with a suitably programmed part. Most failures of
this part may be traced to mishandling, particu-
larly due to static discharge or to a secondary fail-
ure resulting from application of excessive voltage
to the circuit, as may occur if a voltage regulator
fails.
R
3-5