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EN 178
9.
EM6E AB
9.13.7 Diagram T4, L4978D (IC7400)
BLOCK DIAGRAM
THERMAL
SHUTDOWN
2
SS_INH
INHIBIT
7
COMP
8
FB
3.3V
PIN CONNECTIONS
PIN FUNCTIONS
SO (*)
Name
2
GND
Ground
3
SS_INH
A logic signal (active low) disables the device (sleep mode operation).
A capacitor connected between this pin and ground determines the soft start time.
When this pin is grounded disables the device (driven by open collector/drain).
4
OSC
An external resistor connected between the unregulated input voltage and this pin and
a capacitor connected from this pin to ground fix the switching frequency. (Line feed
forward is automatically obtained)
5, 6
OUT
Stepdown regulator output
1
V
Unregulated DC input voltage
CC
12
BOOT
A capacitor connected between this pin and OUT allows to drive the internal DMOS
Transistors
13
COMP
E/A output to be used for frequency compensation
14
FB
Stepdown feedback input. Connecting directly to this pin results in an output voltage of
3.3V. An external resistive divider is required for higher output voltages.
(*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
VOLTAGES
MONITOR
SOFTSTART
3.3V
E/A
PWM
OSCILLATOR
3
OSC
N.C.
1
GND
2
SS_INH
3
OSC
4
OUT
5
OUT
6
N.C.
7
N.C.
8
D97IN596
SO16W
Figure 9-42 Internal Block Diagram and Pin Layout
INTERNAL
INTERNAL
REFERENCE
SUPPLY
R
Q
S
DRIVE
1
GND
16
N.C.
15
N.C.
14
FB
13
COMP
12
BOOT
11
VCC
10
N.C.
9
N.C.
Function
VCC
5
CBOOT
CHARGE
5.1V
6
BOOT
CBOOT
CHARGE
AT LIGHT
LOADS
4
OUT
D97IN594
CL 36532049_003.eps
100603
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