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Colour Television
Chassis
VES1.1E
LA
See
table of contents
on page 3
Published by MB/SC 1363 Quality
Printed in the Netherlands
Subject to modification
EN 3122 785 19393
2013-Mar-29
©
2013
TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS' Shield Emblem are used under license from Koninklijke Philips Electronics N.V.

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Summary of Contents for Philips VES1.1E

  • Page 1 Koninklijke Philips Electronics N.V. or their respective owners. TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust earlier supplies accordingly. PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
  • Page 2 Revision List EN 2 VES1.1E LA 1. Revision List Manual xxxx xxx xxxx.0 • First release. Manual xxxx xxx xxxx.1 • Added the Service Mode menu. Manual xxxx xxx xxxx.2 • Added several new sets to this chassis, see table...
  • Page 3: Table Of Contents

    Contents Introduction ............................. 6 General Block Diagram ........................7 SSB Placement of Blocks ........................8 Tuner (TU3) .............................. 9 General description of the Sony RE216 tuner .................. 9 Audio amplifier stage with AZAD2102 (U163, U164) ................11 General description ........................11 Features ............................
  • Page 4 11.3 Absolute maximum ratings ......................34 11.4 Pinning ............................34 NAND Flash memory – NAND512XXA2C (U162) ................35 12.1 General Description ........................35 12.2 Features ............................35 12.3 Pinning ............................36 LNBH23L (U6) ............................. 37 13.1 Description ............................. 37 13.2 Features............................
  • Page 5 21.1 General description ........................48 21.2 Features ............................48 21.3 Pinning ............................48 Connectors ............................49 22.1 SCART (SC1) ............................ 49 22.2 HDMI (CN707, CN708) ........................49 22.3 VGA (CN711) ..........................50 Service menu mode ..........................51 23.1 Main service menu ......................... 51 23.2 Video Settings ..........................
  • Page 6: Introduction

    25.8 No sound problem at headphone ....................66 25.9 Standby On/Off problem........................ 66 25.10 DVD problems ..........................67 25.11 No signal problem ........................67 Styling sheet ............................69 Schematics ............................70 27.1 SSB ..............................70 27.2 PSU ..............................79 1 Introduction The SSB is driven by a MStar SOC.
  • Page 7: General Block Diagram

    1.1 General Block Diagram GPIO Mstar •• 2XIi'H .O.UDI -HPOErecr-. DIJI1 Block Diagram Drawn Ulas Dere 03.01.2011...
  • Page 8: Ssb Placement Of Blocks

    1.2 SSB Placement of Blocks YPbPr Keypad Nand Demod Flash (U162) Speaker Con. Satellite Tuner CI Connector Tuner(T3 SCART Connec Main IC External (U5) Keyboard HDMI Touchboard Connectors Connector DDR2 Inv. LVDS Adapter DC Flash Connectors (U155) Input SPDIF Power Connector...
  • Page 9: Tuner (Tu3)

    2 Tuner (TU3) A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3 Bands (From 48 MHz to 862 MHz for COFDM, from 45.25 MHz to 863.25 MHz for CCIR channels). The tuning is available through the digitally controlled I2C bus (PLL). In the active antenna option, the following circuits are used.
  • Page 10 ./ Programmable channel Filter bandwidth ./ Fully I C bus controlled ./ For Hybrid TV applications 3.3V pull 1000 ----{)-------w. AGC: :---------------------------------------•------o..-----'M'h\--{ ® f-----..-!-'N\ -OIAocI...
  • Page 11: Audio Amplifier Stage With Azad2102 (U163, U164)

    Pinning Table and Application Block Diagram of Tuner--- 3 Audio amplifier stage with AZAD2102 (U163, U164) 3.1 General description This chassis uses two 2.5 W Class D Mono Audio Amplifers for from 16" to 24" TVs. AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load = 3 Ω,THD = 10%, AVdd = DVdd = 5.5 Volt) with high efficiency filter-free class-D audio power amplifier in a 1613 mm x 1613 mm wafer chip scale package (WCSP).
  • Page 12: Features

    3.2 Features • CMOS Technology • High Efficiency 85% • High PSRR 70 dB at 217 Hz • Differential OP-amp Input • AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI • Provide Mute function (set Mute_B to GND will go into Mute status) •...
  • Page 13: Absolute Ratings

    3.3 Absolute Ratings 3.3.1 Electrical Characteristics AVdd = DVdd, VSS AVss DVss = Ground 25˚C, Filter Bandwidth 20 Hz -20 kHz PARAMETER Symbol TEST COND TIONS UNIT Operating Vo l age AVdd-DVdd AVss-DVss V,VI= V,AV 6 V/V Output offset voltage V,VI= V,AV 6 V/V...
  • Page 14: Operating Specifications

    3.3.2 Operating specifications 25°C,Gain 20 V/V, PARAMETER TEST COND TIONS MIN TYP UNIT 5.0V 2.85 THO+ N 10%, = 1kHz,RL 3.6 V 1.45 3.0 V 0.77 5.0 V 2.25 kHz, 3.6 V 1.15 3.0 V 0.60 Output power 1.75 THO+ N 10%, 1kHz,RL 3.6 V...
  • Page 15: Pinning

    3.4 Pinning 4 Audio amplifier stage with TPA3113 (U168) 4.1 General Description This chassis uses a 6 W Class D Mono Audio Amplifier for from 26” to 32” TVs. The TPA3113D2 is a 6 W (per channel) efficient, Class-D audio power amplifier for driving bridged-tied stereo speakers.
  • Page 16: Absolute Ratings

    3.2. Features • 6 W/ch into an 8-Ω Loads at 10% THD+N From a 10-V Supply • 12-W into a 4-Ω Mono Load at 10% THD+N From a 10-V Supply • 87% Efficient Class-D Operation Eliminates Need for Heat Sinks •...
  • Page 17: Operating Specifications

    4.2.2 Operating Specifications CHARACTERISTICS 25•c, (unless otherwise noted) PARAMETER TEST COND ITIONS UNIT 200 mVpp ripple from 20 Hz-1kHz, Supply ripple rejection KsvR Gain 20 dB,Inputs ac-coupled to AGNO THO+N Total harmonic distortion +noise 8 0, f 1kHz, (half-power) 0.06 Output integrated noise...
  • Page 18: Power Stage

    5 Power stage The DC voltages required at various parts of the chassis and panel are provided by a main power supply unit. This chassis can operate with the different supplies: IPS60, IPS16, IPS17, PW26, PW27 as main power supply and also with 12V adaptor. CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW27.
  • Page 19 The blocks on power block diagram is using dependent to main supply. For PW26 and PW27 just common blocks are enough for proper operation. For IPS16, IPS17, IPS60 below blocks must work properly. For adapter case also below blocks are necessary.
  • Page 20 Short CCT Protection Circuit Short circuit protection is necessary for protecting chassis and main IC against damages when any Vcc supply shorts to ground. Protect pin should be logic high while normal operation. When there is a short circuit protect pin shold be logic low. After any short detection, SW forces LEDs on LED card to blink.
  • Page 21: Power Management

    5.1 Power management --- Power Management with Adaptor--- --- Power Management with PW25/ PW26---...
  • Page 22 --- Power Management with IPS16/IPS17/IPS60/PW05--- --- Power Management with PW03/PW04/PW07---...
  • Page 23: Microcontroller - Mstar (U5)

    6 Microcontroller – MSTAR (U5) 6.1 Description MSD9WB9PT-2 (Main IC) (U5) The MSD9WB9PT-2 is MStar’s most up-to-date system-on-chip solution for flat panel integrated digital television products. Building on the success of MStar’s preceding SOC series, the MSD9WB9PT-2 provides most cost-effective solution for DTV application with creative and attractive features exclusively presented by MStar.
  • Page 24 • MPEG-4 Video Decoder o ISO/IEC 14496-2 MPEG-4 ASP video decoding o Supports resolutions up to HDTV (1080p@30fps) o Supports DivX1 Home Theater & HD profilesOptional o Supports VC-1Optional, FLV video format decoding • Hardware JPEG o Supports sequential mode, single scan o Supports both color and grayscale pictures o Following the file header scan the hardware decoder fully handles the decode process...
  • Page 25 o Analog RGB Compliant Input Port o Three analog ports support up to 1080P o Supports PC RGB input up to SXGA@75Hz o Supports HDTV RGB/YPbPr/YCbCr o Supports Composite Sync and SOG Sync-on-Green o Automatic color calibration o AV-link support o Analogue RGB Auto-Configuration &...
  • Page 26 o Allows CVBS output of all source inputs • 2D Graphics Engine o Hardware Graphics Engine for responsive o Interactive applications o Supports point draw, line draw, rectangle draw/fill, text draw and trapezoid draw o BitBlt, stretch BitBlt, trapezoid BitBlt, mirror BitBlt and rotate BitBlt o Raster Operation (ROP) o Support Porter-Duff •...
  • Page 27: Mstar Block Diagram

    6.2 MSTAR block diagram...
  • Page 28: Reset Circuit

    6.3 Reset circuit Reset circuit using for initiliazing main Mstar IC. Reset condition is high and nomal working condition is low for RESET pin. 7 CI interface CI Interface Power Switch: It is used for CI module supply, when Module is inserted (it means CI detect is low) This circuit is opened or closed by CI_POWER_CTRL port of main uController...
  • Page 29: Usb Interface

    8 USB interface Main Concept IC has integrated 2 USB 2.0 interface. One of them is used for ethernet function, the other one is used for USB connectivity for last user. Last user can play video, picture and audio files. Also digital channels can be record to external storage device by this interface.
  • Page 30: Ddr2 Sdram K4T1G164Qf (U155)

    9 DDR2 SDRAM K4T1G164QF (U155) 9.1 Description The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x 8 banks, 8Mbit x 16 I/Os x 8 banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1066Mb/sec/pin (DDR2-1066) for general applications. The chip is designed to comply with the following key DDR2 SDRAM features such as posted CAS with additive latency, write latency = read latency - 1, Off-Chip Driver (OCD) impedance adjustment and On Die Termination.
  • Page 31: Pinning

    Pinning VssQ VoDQ UOQS VssQ VssQ OQ14 UOQS DQ15 VoDQ VoDQ VoDQ VooQ VssQ VssQ OQ12 DQ10 OQ13 VoDQ VssQ LDQS VssQ VssQ LOQS VoDQ VoDQ VoDQ VooQ VssQ VssQ VooL VREF VssoL A10/AP • • • • • • + + + + + + •·...
  • Page 32: Scaler And Lvds Sockets

    10 Scaler and LVDS sockets 10.1 LVDS sockets block diagram 10.2 Panel supply switch circuit This switch is used to open and close panel supply of TCON. It is controlled by port of main ucontroller. Also with this circit panel sequency could be adjusted correctly. 3 panel supplys are connected to this circuit.
  • Page 33: Spi Flash Memory - Mx25L1005 (U158)

    11 SPI flash memory - MX25L1005 (U158) 11.1 General Description MX25L1005 is a CMOS 1,048,576 bit serial Flash memory, which is configured as 131,072 x 8 internally.The MX25L1005 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).
  • Page 34: Absolute Maximum Ratings

    • 2.7 to 3.6 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V • Low Vcc write inhibit is from 1.5V to 2.5V 11.3 Absolute maximum ratings RATING VALUE Ambient Operating 0°C to 70°C Temperature Storage Temperature -55°C to 125°C...
  • Page 35: Nand Flash Memory - Nand512Xxa2C (U162)

    12 NAND Flash memory – NAND512XXA2C (U162) 12.1 General Description The NAND flash 528-byte/ 264-word page is a family of non-volatile flash memories that uses the single level cell (SLC) NAND technology. It is referred to as the small page family.
  • Page 36: Pinning

    • Status register • Electronic signature • Chip Enable ‘don’t care’ • Security features o OTP area • Serial number (unique ID) option • Hardware data protection o Program/erase locked during power transitions • Data integrity o 100,000 program/erase cycles (with ECC) o 10 years data retention •...
  • Page 37: Lnbh23L (U6)

    13 LNBH23L (U6) 13.1 Description Intended for analog and digital satellite receivers,the LNBH23L is a monolithic voltage regulator and interface IC, assembled in QFN32 5 x 5 specifically designed to provide the 13 / 18 V power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna dish or to the multi-switch box.
  • Page 38: Block Diagram

    13.3 Block diagram 14 Advanced DVB-S/S2 demodulator M88DS3002 (U3) 14.1 Description The M88DS3002 is an advanced single-chip demodulator for digital satellite television broadcasting. It is fully compliant with the DVB-S/S2 standard and can support QPSK, 8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast, easy-to- apply and cost-effective front-end solution for digital satellite receiver.
  • Page 39 • DSP features • Symbol rate sweeping • I/Q impairment cancellation • Automatic spectrum inversion • Adaptive equalizer for RF reflection removal • Roll-off factor automatic identification • Blind scan for programming search • High performance on-chip micro-controller • Multi-error monitor •...
  • Page 40: Pin Assignment

    ---Block Diagram of M88DS3002--- 14.3 Pin Assignment...
  • Page 41: Lm1117 (U175, U180, U181)

    15 LM1117 (U175, U180, U181) 15.1 General description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors.
  • Page 42: Pinning

    15.5 Pinning 16 MP2012 (U176) 17 General description The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM step-down converter. It is ideal for powering portable equipment that runs from a single cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can provide up to 1.5A of load current with output voltage as low as 0.8V.
  • Page 43: Pinning

    17.2 Pinning Name Description Feedback input. An external resistor divider from the output to GND, tapped to the FB pin sets the output voltage. GND, Ground pin. Connect exposed pad to ground Exposed plane for proper thermal performance. Switch node to the inductor. PVIN Input supply pin for power FET.
  • Page 45: Pinning

    18.3 Pinning Pin No. Description Name BOOT Bootstrap for high-side gate driver. Connect a 0.1μF or greater ceramic capacitor from BOOT to SW pins. Input Supply 4.5V to 23V. Must bypass with a suitably large ceramic capacitor. Phase Node--Connect to external L-C filter.. 4, 9 (Exposed Ground.
  • Page 46: Mp1583 (U174)

    19 MP1583 (U174) 19.1 General description The MP1583 is a step-down regulator with a built-in internal Power MOSFET. It achieves 3A of continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization.
  • Page 47: Fdc642

    Enable/UVLO. A voltage greater than 2.71V enables operation. For complete low current shutdown the EN pin voltage needs to be at less than 900mV. When the voltage on EN exceeds 1.2V, the internal regulator will be enabled and the soft-start capacitor will begin to charge.
  • Page 48: Fdc604P

    21 FDC604P 21.1 General description This P-Channel 1.8V specified MOSFET uses Fairchild’s low voltage PowerTrench process. It has been optimized for battery power management applications. 21.2 Features • –5.5 A, –20 V. RDS(ON) = 33 mΩ @ VGS = –4.5 V •...
  • Page 49: Connectors

    22 Connectors 22.1 SCART (SC1) 22.2 HDMI (CN707, CN708)
  • Page 50: Vga (Cn711)

    22.3 VGA (CN711) VERTICAL SYNC DOC CLOCK...
  • Page 51: Service Menu Mode

    SW Profile Version: The version number of the software profile. Lan Profile Version: The version number of the Lan profile. Customer: Philips Items exist in the main screen of service menu. Also, software version number and DCF id are written in...
  • Page 52: Video Settings

    The main items in Service Menu: 23.2 Video Settings RF AGC adjustments for neighbour and image channels exist or don't. Also, ADC Calibration gain and offset values for RGB separately due to selected sources 23.3 Audio Settings Surround type and surround mode text items are displayed.
  • Page 53: Options 1

    23.4 Options 1 Profile options such as AUTO TV off time, Power up mode, EPG type, etc. are displayed in options 1. 23.5 Options 2 Profile options such as APS sorting, Dynamic Menu, Auto zoom mode etc. are displayed in Options 2.
  • Page 54: Tuning Settings

    23.6 Tuning Settings Tuner type is displayed. 23.7 Source Settings Enable and disabled sources are displayed. When TV is disabled, Items which are connected to Tuner are picked off from menu. (Install and Retune Menu, Channel List Menu...). 23.8 Diagnostic The result of various diagnostic tests are displayed here.
  • Page 55 Video Settings • RF AGC SECAM • RF AGC NEIGHBOUR NO IMAGE NO • RF AGC NEIGHBOUR NO IMAGE YES • RF AGC NEIGHBOUR YES IMAGE NO • RF AGC NEIGHBOUR YES IMAGE YES • RF AGC • ADC Calibration Source •...
  • Page 56 • HDMI Number • Remote control type • DCF ID Tuning Settings • Tuner Type Source Settings • TV • EXT1 • EXT2 • EXT2-S • • S-VIDEO • HDMI 1 • HDMI 2 • HDMI 3 • HDMI 4 •...
  • Page 57: Profile Operations

    USB stick should be connected before this operation. 23.10 Profile Operations VES1.1E LA profile data are kept in the flash file system as separate files. So they can be downloaded to USB memory stick or uploaded to TV from a memory stick individually.
  • Page 58: Edid Update

    Note: To order a yellow remote, use order code: 22AV8573/00 or 12NC 8670 000 67389. 23.11.1 Hotel TV welcome image update (only available in Hotel TVs) In the VES1.1E LA the welcome image can be updated: Copy To USB There are two steps and both are independent of each other.
  • Page 59: Software Update

    24 Software update In the VES1.1E LA there is only one software package. From following steps software update procedure can be seen: MB62_en.bin, mboot.bin and usb_auto_update_T4.txt documents should copy directly inside of a flash memory(not in a folder). Put flash memory to the tv when tv is powered off.
  • Page 60 Backlight power supply should be in panel specs. Please check CN705 for the SSB, related connectors for power supply cards.
  • Page 61: Ci Module Problem

    STBY_ON/OFF should be low for standby on condition, please check R1677. 25.2 CI module problem Problem: CI is not working when CI module inserted. Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins CI supply shoul be 5V when CI module inserted. If it is not 5V please check CI_POWER_CTRL, this pin should be low.
  • Page 62 Please check mechanical positions of the CI module. Detect ports should be low. If it is not low please check the Cl connector pins, Cl module pins and 3V3_VCC on the SSB. R1632 Detect PCM OB_N PCM All PCM A13 3V3_VCC ".
  • Page 63: Led Blinking Problem

    25.3 LED blinking problem Problem: LED blinking, no other operation This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
  • Page 64: Keypad Touchpad Problems

    LED SOCKET L--<J SV STBY F259 +---- · 2 -- - -·[>IR C949 600R · Ql70 Ql7l BC949B .-< 25.5 Keypad touchpad problems Problem Keypad or Touchpad is not working. Check keypad supply and keyboard pin on the SSB.
  • Page 65: Usb Problems

    25.6 USB problems Problem: USB is not working or no USB Detection. Check USB Supply, It should be nearly 5V. 25.7 No sound problem Problem: No audio at main TV speaker outputs.
  • Page 66 Check supply voltages of VDD_AUDIO, 5V_VCC and 3V3_VCC with a voltage-meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v. 25.8 No sound problem at headphone Problem: No audio at headphone output.
  • Page 67 There may be a problem about power supply. Check 12V_VCC, 5V_VCC and 3V3_VCC with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is goood to check SW printouts via hyper-terminal (or Teraterm).
  • Page 69 26 Styling sheet 17LD98 SCREW P C ZN Y DISPLAY ASM 32" LED METAL FRAME 32" LED BACK COVER METAL 32130 BACK COVER 32130 LED DVD SCREW P C ZN YFMB 3 x 9.5 COVER FOOT...
  • Page 70 27 Schematics 27.1 SSB ACTIVE_ANT_SUPPLY NUTUNE/SEMCO/LG C965 100n C904 TP48 100n ANT-DC ANT-DC ACTIVE_ANT_SUPPLY R1595 +3V3 12V_VCC R1597 3V3_TUNER 3V3_TUNER TUN_SCL R1963 IF_AGC_MST 100R IF_AGC_TUNER TUN_SCL TUN_SCL_MST F304 R1581 C912 C910 ACTIVE_ANT_SUPPLY 100n 100n FDN336P TUN_SDA TUN_SDA_MST R1590 Q175 Q172 R1594 ANT_CTRL BC848B...
  • Page 71 PC INPUT SCART 5V_VCC SCART VIDEO OUTPUT AMPLIFIER C663 100n R124 F179 12V_VCC 220R SC_CVBS_IN R1949 SC_CVBS_OUT 100R VGA_VSNC 220p C860 C836 R1243 Q146 100R VGA_HSNC BC858B R1233 C378 220R Q119 SCART_CVBS_OUT R1249 BC848B SC_FB R1587 R620 SC_CVBS_OUT SC_R 100R 220p C833 R1480...
  • Page 72 NAND FLASH CI INTERFACE MSD9WB9PT-2 DDR18V F187 R1632 CN141 FLH_3.3V 3V3_VCC 3V3_VCC A_MADR0 A_MADR[0] A_MADR1 NAND_WPz PCM_D3 PCM_CD1_N A_MADR[1] C868 NC29 C657 C656 A_MADR2 TS_MDO3 PCM_D4 A_MADR[2] 100n 100n A_MADR3 TS_MDO4 PCM_D5 A_MADR[3] NC28 A_MADR4 TS_MDO5 PCM_D6 A_MADR[4] A_MADR5 AA_MDATA0 AA_MADR0 TS_MDO6 PCM_D7...
  • Page 73 HDMI2 CN708 AUDIO OUTPUTs R1877 HDMI_0_RX2P R1869 R1900 HDMI_0_RX2N 100R C1197 HDMI_0_RX1P MAIN_L DSP_MAIN_L SCART_AUDIO_IN_L C1198 AUL0 RXA0N HDMI_1_RX0N R1868 R1887 SCART_AUDIO_IN_R AUR0 RXA0P HDMI_1_RX0P HDMI_0_RX1N SAV_AUDIO_IN_L 10u 10V AUL1 RXA1N HDMI_1_RX1N HDMI_0_RX0P SAV_AUDIO_IN_R C1196 AUR1 RXA1P HDMI_1_RX1P R1867 R1886 C1195 AUL2 RXA2N...
  • Page 74 AUDIO AMP for 16" to 24" POP NOISE CIRCUIT 12V_VCC U163 PT2333 5V_VCC Q160 MAIN_L BC848B C612 R623 L_AUDIO_P_OUT 220n C1032 C665 L_AUDIO_N_OUT 100n Q195 BC858B AMP_EN VDD_AUDIO BC848B C1058 Q186 100n R1702 R1684 BC848B AMP_MUTE Q185 U164 PT2333 BC848B MAIN_R Q133 C602...
  • Page 75 R1835 R1833 TX_B_0_N 15.6" LVDS OPTION PCM_CD1_N TP34 AA19 PWM0 LVB0P TX_B_0_P TX_B_0_P R1615 SERIAL FLASH AA20 3V3_VCC PWM1 LVB0M TX_B_0_N TP33 AA18 PWM2 LVB1P TX_B_1_P D165 TX_B_1_N BACKLIGHT_DIM 3V3_STBY 3V3_STBY LVB1M TX_B_1_N 3V3_STBY TX_A_0_N TP32 PANEL_VCC LVB2P TX_B_2_P TX_B_1_P C658 1N5819 LVB2M...
  • Page 76 F274 F277 2V5_VCC AVDD_2V5_PGA 1V2_VCC VDDC_1V2 C1007 C1081 C997 C1005 C1070 100n 100n 100n 100n AVSS_PGA F271 3V3_STBY AVDD_3V3 C1030 C1024 C1025 C1022 100n 100n 100n 60R 402 ferrite secilecek F305 2V5_VCC AVDD2V5_ADC F272 1V8_VCC AVDD_DDR C1028 C1009 C1223 100n 100n C990 100n...
  • Page 77 ADAPTER SOCKET W_ADAPTER 12V_STBY 7A/32VDC POWER BLOCK DIAGRAM W/ADAPTOR 12V_INV 7A/32VDC DC/DC1 12V_STBY 12V_VCC DC-DC4 1V2_VCC C1038 DC-DC1 TP36 100n 5V_VCC U174 12V_VCC C1112 5V_STBY MP1583 5V_STBY 1 BS F287 R1972 12V_STBY 12V_STBY R1709 5V_VCC COMP C1091 C1092 C1037 R1690 LDO2 100n DC-DC2...
  • Page 78 27.2 PSU...

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