Figure 1-1: Timing For The Data And Clock Signals - Sony Tektronix AWG2021 Service Manual

Table 1-3: Electrical Characteristics (Cont.)
Characteristics
MARKER2
Amplitude
Rise/Fall time
Marker to Signal delay
CLOCK
Amplitude
ECL DIGITAL DATA OUT
(Option 03)
Skew between Data
Clock to Data delay
TTL DIGITAL DATA OUT
(Option 04)
Amplitude
Output Data rate
Clock to Data delay
(See Figure 1-1)
AWG2021 Service Manual
Description
2.5 V (+5%, -10%) into 50 W, 5 V (+5%, -10%) into open
circuit
< 8 ns
Within 15 ns
1 V ±0.3 V into 50 W
Within 1 ns
Within 2 ns
>2 V into 50 W
100 MB/s minimum
Within ±4 ns
Middle point of the Data
Data
50%
Clock

Figure 1-1: Timing for the Data and Clock Signals

Performance Characteristics
Performance Test
MARKER OUT Amplitude
Check, page 4-40.
C
CLOCK OUT Amplitude
Check, page 4-32. C
ECL DIGITAL DATA OUT
Check, page 4-47.
TTL DIGITAL DATA OUT
Check, page 4-51.
Within ± 4 ns
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