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Table 9. Memory operating modes (continued)
Memory Operating Mode
Dell Fault Resilient Mode
Optimizer Mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not
impose any specific slot population requirements.
● Dual processor: Populate the slots in round robin sequence starting with processor 1.
NOTE:
Processor 1 and processor 2 population should match.
Table 10. Memory population rules
Processor
Configuration
Dual processor (Start
Optimized (Independent
with processor1.
channel) population order
processor1 and
processor 2
population should
match)
Mirroring population order
Single rank sparing population
order
Multi rank spare population
order
Fault resilient population order
Removing a memory module
Prerequisites
WARNING:
Allow the memory modules to cool after you power off the system.
1. Follow the safety guidelines listed in
44
PowerEdge C4140 installing and removing system components
Memory population
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}...
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}...
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}...
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
Safety instructions
on page 23.
Description
NOTE:
Memory sparing does not offer protection against
a multi-bit uncorrectable error.
The Dell Fault Resilient Mode if enabled, the BIOS creates
an area of memory that is fault resilient. This mode can be
used by an OS that supports the feature to load critical
applications or enables the OS kernel to maximize system
availability.
NOTE:
This feature is only supported in Gold and Platinum
Intel processors.
NOTE:
Memory configuration has to be of same size
DIMM, speed, and rank.
Memory population information
● Odd amount of DIMMs per
processor allowed.
● Optimizer population order is
not traditional for 4 and 8
DIMM installations of single
processor.
○ For 4 DIMMs: A1, A2, A4, A5
○ For 8 DIMMs: A1, A2, A4,
A5, A7, A8, A10, A11
Mirroring is supported with 6
DIMMs per processor.
Populate in this order, odd amount
per processor allowed. Requires
two ranks or more per channel.
Populate in this order, odd amount
per processor allowed. Requires
three ranks or more per channel.
Supported with 6 DIMMs per
processor.
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