Spis1/Spiss Select (Sw13); Video Encoder Clock Select Jumper (Jp1); Vddint Select Jumpers (Jp2 And Jp3) - Analog Devices ADSP-BF561 EZ-KIT Lite System Manual

Jumper and DIP Switch Settings

SPIS1/SPISS Select (SW13)

The /
SPIS1 SPISS
nals from the board, making them available on the SPI connector (
The default is the

Video Encoder Clock Select Jumper (JP1)

The video encoder clock select jumper (
ADV7179 video encoder's clock. The jumper setting is shown in
Table 2-9.
Table 2-9. Video Encoder Clock Select Jumper (JP1)
JP1 Position
1 and 2
2 and 3

VDDINT Select Jumpers (JP2 and JP3)

The processor internal voltage (
the source of the processor's internal voltage. For the core clock set at
533 MHz and higher, select the on-board external regulator for
The jumper settings are shown in
Table 2-10. Processor Internal Voltage Select Jumpers (JP2 and JP3)
JP2
Not populated
Populated
2-14
select switch (
SW13
position.
ON
Mode
Input clock for encoder is generated from 27 MHz oscillator (default)
Input clock for encoder is generated from output clock of decoder. This is
used when synchronizing the encoder and decoder clock is required.
VDDINT
JP3 VDDINT Source
1 and 2 Provided by the on-board external regulator
ON
2 and 3 Provided by the processor through the
ON
(internal regulator)
ADSP-BF561 EZ-KIT Lite Evaluation System Manual
) disconnects the
) determines the source of the
JP1
) select jumpers (
Table 2-10.
and sig-
SPIS1 SPISS
).
P5
) determine
JP2–3
.
VDDINT
pins
VROUT