Samsung S3C9444 User Manual page 54

S3C9444/F9444_UM_REV1.10
P0CONL
— Port 0 Control Register (Low Byte)
Bit Identifier
RESET Value
Read/Write
.7–.6
.5–.4
.3–.2
.1–.0
.7 .6
0 0
R/W R/W
Not used for the S3C9444
Port 0, P0.2/ADC2 Configuration Bits
0 0 Schmitt trigger input
0 1 Schmitt trigger input; pull-up enable
1 0 Push-pull output
1 1 A/D converter input (ADC2); Schmitt trigger input off
Port 0, P0.1/ADC1/INT1 Configuration Bits
0 0 Schmitt trigger input/falling edge interrupt input
0 1 Schmitt trigger input; pull-up enable/falling edge interrupt input
1 0 Push-pull output
1 1 A/D converter input (ADC1); Schmitt trigger input off
Port 0, P0.0/ADC0/INT0 Configuration Bits
0 0 Schmitt trigger input/falling edge interrupt input
0 1 Schmitt trigger input; pull-up enable/falling edge interrupt input
1 0 Push-pull output
1 1 A/D converter input (ADC0); Schmitt trigger input off
.5 .4
0 0
R/W R/W R/W
CONTROL REGISTERS
.3 .2 .1
0 0 0
R/W R/W
E7H
.0
0
R/W
4-9