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High-voltage Serial Programming Characteristics
Figure 29. High-voltage Serial Programming Timing
Table 24. High-voltage Serial Programming Characteristics
= 25 ° C ± 10%, V
T
= 5.0V ± 10% (Unless otherwise noted)
A
CC
Symbol
Parameter
t
SCI (PB3) Pulse Width High
SHSL
t
SCI (PB3) Pulse Width Low
SLSH
SDI (PB0), SII (PB1) Valid to SCI (PB3)
t
IVSH
High
SDI (PB0), SII (PB1) Hold after SCI (PB3)
t
SHIX
High
t
SCI (PB3) High to SDO (PB2) Valid
SHOV
t
Wait after Instr. 3 for Write Fuse Bits
WLWH_PFB
Low-voltage Serial Downloading (ATtiny12 only)
Both the program and data memory arrays can be programmed using the SPI bus while RESET is pulled to GND. The
serial interface consists of pins SCK, MOSI (input) and MISO (output), see Figure 30. After RESET is set low, the Program-
ming Enable instruction needs to be executed first before program/erase instructions can be executed.
Figure 30. Serial Programming and Verify
For the EEPROM, an auto-erase cycle is provided within the self-timed write instruction and there is no need to first
execute the Chip Erase instruction. The Chip Erase instruction turns the content of every memory location in both the
program and EEPROM arrays into $FF.
The program and EEPROM memory arrays have separate address spaces:
$0000 to $01FF for program memory and $000 to $03F for EEPROM memory.
SDI (PB0), SII (PB1)
t
IVSH
SCI (PB3)
SDO (PB2)
ATtiny12
GND
PB5 (RESET)
GND
t
t
SLSH
SHIX
t
SHSL
t
SHOV
Min
Typ
100
100
50
50
10
16
1.0
1.5
2.2 - 5.5V
VCC
PB2
SCK
PB1
MISO
PB0
MOSI
ATtiny10/11/12
Max
Units
32
1.8
ns
ns
ns
ns
ns
ms
45
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