Quectel BG96 Series Hardware Design page 21

Lte module
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UART1 Interface
Pin Name
Pin No.
DTR
30
RXD
34
TXD
35
CTS
36
RTS
37
DCD
38
RI
39
UART2 Interface
Pin Name
Pin No.
DBG_RXD
22
DBG_TXD
23
UART3 Interface
Pin Name
Pin No.
BG96_Hardware_Design
I/O
Description
Data terminal
DI
ready(sleep
mode control)
DI
Receive data
DO
Transmit data
DO
Clear to send
Request to
DI
send
Data carrier
DO
detection
DO
Ring indicator
I/O
Description
DI
Receive data
DO
Transmit data
I/O
Description
BG96 Hardware Design
DC
Comment
Characteristics
V
min=-0.3V
IL
1.8V power domain.
V
max=0.6V
IL
If unused, keep this pin
V
min=1.2V
IH
open.
V
max=2.0V
IH
V
min=-0.3V
IL
1.8V power domain.
V
max=0.6V
IL
If unused, keep this pin
V
min=1.2V
IH
open.
V
max=2.0V
IH
1.8V power domain.
V
max=0.45V
OL
If unused, keep this pin
V
min=1.35V
OH
open.
1.8V power domain.
V
max=0.45V
OL
If unused, keep this pin
V
min=1.35V
OH
open.
V
min=-0.3V
IL
1.8V power domain.
V
max=0.6V
IL
If unused, keep this pin
V
min=1.2V
IH
open.
V
max=2.0V
IH
1.8V power domain.
V
max=0.45V
OL
If unused, keep this pin
V
min=1.35V
OH
open.
1.8V power domain.
V
max=0.45V
OL
If unused, keep this pin
V
min=1.35V
OH
open.
DC
Comment
Characteristics
V
min=-0.3V
IL
1.8V power domain.
V
max=0.6V
IL
If unused, keep this pin
V
min=1.2V
IH
open.
V
max=2.0V
IH
1.8V power domain.
V
max=0.45V
OL
If unused, keep this pin
V
min=1.35V
OH
open.
DC
Comment
Characteristics
LTE Module Series
20 / 78

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