Ia Warning: Too Few States -- Modes Assumed; Ia Warning: Next Btm Missing -- No Disassembly; Ia Warning: Disassembly Requires Branch Trace; Data Ecc Error - HP E2466C User Manual

Preprocessor interface for the intel pentium ii processor
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Transaction tracker/inverse assembler errors and warnings
<ia warning: too few states -- modes assumed>
The preprocessor interface communicates its switch settings and dynamic
AERR/BINIT observation policies to the logic analyzer via a repeating serial
frame on the preprocessor-generated "config" signal. This error indicates
that not enough states were acquired by the logic analyzer to contain a full
serial frame. The software makes the assumptions listed below.
-- State Mode with Compacted Clock Qualifier
-- AERR/BINIT observation policies disabled
<ia warning: next BTM missing -- no disassembly>
Disassembled instructions are displayed as a continuous block for each
Branch Trace Message (BTM) transaction. For any given BTM, the software
searches for the next BTM to determine which instruction caused a branch to
be taken. Near the end of acquisition, the next BTM may be incomplete or
missing. Also, if the number of states to the next BTM exceeds the internal
search limit, it will be treated as missing.
<ia warning: disassembly requires Branch Trace>
With "Display Disassembly" selected in the Preferences dialog, a code read
from the reset vector is treated as a "virtual" Branch Trace Message and
normally begins a block of disassembled instructions. This warning indicates
that the next "real" BTM is not found. To correct this warning, turn off
"Display Disassembly" or enable BTMs on the target system.
<data ECC error: ... >
"Display Read/Write ECC Errors" is selected in the Preferences dialog and an
error was detected on D[63:00]# or DEP[7:0]#. This could be a real data
integrity problem on the target system, but other more likely reasons are
listed below:
-- E2466C probe end not clamped tightly to CPU daughter card.
-- Logic analyzer pods for the D[63:00]# signals are swapped.
-- Data bus ECC checking is not enabled on the target system.
A–10
Preprocessor Interface for the Pentium II Processor

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