To Connect To The Apic And Jtag Signals - HP E2466C User Manual

To connect to the APIC and JTAG signals

The APIC and JTAG signals are routed to headers J2 and J3, located
next to the green LED. These signals can be probed using the GP
[General Purpose] probes that are shipped with your logic analyzer.
Figure 10 shows the location of the headers. Table 2 shows the
signals that are located on the pins of each header. These signals,
with the exception of "lreset", are buffered versions of the Pentium II
processor bus signals; they are not latched by the bus clock. The
special signal "lreset" is an inverted version of the P6 RESET# signal
and is latched by the bus clock.
Do not attempt to use the JTAG header as a run-control interface. This header
is only capable of monitoring JTAG activity.
The APIC signals can be connected to the HP E2467A APIC Bus
Preprocessor Interface. Connectors J5 and J6 on the preprocessor PC
board are reserved.
1-20 Preprocessor Interface for the Pentium II Processor