Pentium Ii Preferences Dialog; Disassembly; Transactions - HP E2466C User Manual

Preprocessor interface for the intel pentium ii processor

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Using the Inverse Assembler

Pentium II preferences dialog

Preferences options are accessed from the Listing menu bar by clicking on

Invasm and selecting Preferences. The Preferences dialog controls the level

of detail for states shown. Figure 17 shows the Preferences dialog.

When "Display Disassembly" is selected, a block of instructions appears in the

Listing window under each Branch Trace Message transaction or Memory

Code Read from the reset vector (the instruction cache(s) must be disabled).

"Display Instruction Data" turns on/off the display of data bytes

corresponding to each instruction. "Display Branch Trace Details" shows the

causing and target linear addresses contained in each Branch Trace Message

transaction.

The transaction Format can be set to "Short" to display one line per

transaction data chunk (DRDY# asserted state), or "Long" for more

extensive information about the phases. "Display Deferred Pairing"

consolidates the deferred reply transaction information directly beneath the

original deferred transaction. "Display Read/Write ECC Errors" examines the

D[63:00]# and DEP[7:0]# signals during DRDY# asserted states and displays

detected errors not on the data phase, but on the Request phase which

started the transaction. Bad bits are identified for single-bit correctable

errors. These ECC options should only be selected when data bus

error-checking is enabled on the target system. While CPU agents usually

drive DEP[7:0]#, non-CPU agents may or may not, so exercise judgement

when turning on "Display Read ECC Errors".

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Preprocessor Interface for the Pentium II Processor

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