Vid(Ac), Ac Differential Input Voltage Test For Dqs - Test Method Of Implementation; Signals Of Interest; Test Definition Notes From The Specification - Keysight Technologies D9020DDRC Manual

10 Differential Signals AC Input Parameters Tests
V , AC Differential Input Voltage Test for DQS - Test Method of Implementation
ID(AC)
The purpose of this test is to verify that magnitude differences between the input differential signal
pairs value of the test signals is within the conformance limits of the V
specification.
The value of V
limit set used. User may choose to use the UDL (User Defined Limit) feature in the application to
perform this test against a customized test limit set based on different values of V

Signals of Interest

Mode Supported: DDR2 only
Signal cycle of interest: WRITE
Require Read/Write separation: Yes
Signal(s) of Interest:
•
Signals required to perform the test on the oscilloscope:
•
•

Test Definition Notes from the Specification

Table 91 Differential Input AC Logic Level
Symbol Parameter
V AC differential input voltage
ID(AC)
Table 92 Differential Input AC Logic Level (DDR2-1066)
Symbol Parameter
V AC differential input voltage
ID(AC)
146
which directly affects the conformance lower limit is set to 1.8V for the compliance
DDQ
Data Strobe Signal (supported by Data Signal)
Pin Under Test, PUT - Data Strobe Signals
Supporting Pin - Data Signals
as specified in the JEDEC
ID(AC)
Min Max
0.5 V
DDQ
Min Max
0.5 V + 0.6
DDQ
DDR2(+LP) Compliance Testing Methods of Implementation
.
DDQ
Units Notes
V 1,3
Units Notes
V 1