Table of Contents
Advertisement
design of the ME that bounds itself to every module the ME was flashed to previously. In the case of an external SPI
flash, this is the module present at flash time.
To avoid this issue, conduct a complete flash of the external SPI flash device after changing the COM Express® module
for another module. If disconnecting and reconnecting the same module again, this step is not necessary.
9.11. SMBus
System Management Bus (SMBus) is a 2-wire serial interface used to connect several devices. The SMBus's low
bandwidth makes the SMBus ideal for sensors and power related signals with low data content. The COMe-CDV7's
FPGA supports SMB_CK, SMB_DAT and SMB_ALERT# signals.
9.12. SpeedStep® Technology
SpeedStep® technology enables you to adapt high performance computing to your applications by switching
automatically between maximum performance mode and battery-optimized mode, depending on the needs of the
application. When battery powered or running in idle mode, the processor drops to lower frequencies (by changing the
CPU ratios) and voltage, thus conserving battery life while maintaining a high level of performance. The frequency is
automatically set back to the high frequency, allowing you to customize performance. To use Intel® Enhanced
SpeedStep® the operating system must support SpeedStep® technology.
By deactivating the SpeedStep® technology in the BIOS, manual control or modification of the CPU performance is
possible. Setup the CPU Performance State in the BIOS setup or use third party software to control the CPU
Performance States.
9.13. TPM 2.0
The TPM 2.0 chip stores RSA encryption keys specific to the host system for hardware authentication. The term TPM
refers to the set of specifications applicable to TPM chips. The LPC bus connects the TPM chip to the SoC.
The TPM 2.0 device contains an RSA key pair called the Endorsement Key (EK). The pair is maintained inside the TPM
chip and cannot be accessed by software. The Storage Root Key (SRK) is created when a user or administrator takes
ownership of the system. The TPM generates the key pair based on the Endorsement Key and an owner-specified
password.
A second key, called an Attestation Identity Key (AIK) protects the device against unauthorized firmware and software
modification by hashing critical sections of firmware and software before they are executed. When the system
attempts to connect to the network, the hashes are sent to a server that verifies that they match the expected values. If
any of the hashed components have been modified since the last start, the match fails, and the system cannot gain
entry to the network.
9.14. UART
The UART implements an interface for serial communications and supports up to two serial RX/TX ports on
pin A98 (SERO_TX) and pin A99 (SERO_RX) for UART0, and pin A101 (SER1_TX) and pin A102 (SER1_RX) for UART1.
The UART controller is fully 16550A compatible and supports:
On-Chip bit rate ( baud rate) generator
No handshake lines
Interrupt function to the host
FIFO buffer for incoming and outgoing data
www.kontron.com
COMe-cDV7 - User Guide, Rev 1.0
// 45
Advertisement
Table of Contents
