Spectrum Digital TMS320DM6467 Technical Reference page 13

1.4 Memory Map
The DaVinci family of processors have a large byte addressable address space, some
limitations to byte addressing are determined by peripheral interconnection to the
TMS320DM6467 device. Program code and data can be placed anywhere in the
unified address space. Addresses are multiple sizes depending on hardware
implementation. Refer to the appropriate device data sheets for more details.
The memory map shows the address space of a TMS320DM6467 processor on the left
with specific details of how each region is used on the right. By default, the internal
memory sits at the beginning of the address space. Portions of memory can be
remapped in software as L2 cache rather than fixed RAM.
The part incorporates a dual EMIF interface. One dedicated EMIF directly interfaces to
the DDR2 memory. The NAND Flash is mapped into CS2 space on the other EMIF.
When CS2 is used for daughter card interfacing the daughter card enable pin must be
brought high.
TMS320DM6467 EVM
Address
0x00000000
Internal ARM RAM (instruction)
0x00008000
Internal ARM ROM (instruction
0x00010000
Internal ARM RAM (data)
0x00018000
Internal ARM ROM (data)
0x00818000
L2 RAM/Cache (C64x+)
0x00E00000
0x00F00000
L1 D RAM/Cache (C64x+)
0x30000000
0x42000000
0x4C000000
0x80000000
0xA0000000
Figure 1-3, Memory Map, TMS320DM6467 EVM
Spectrum Digital, Inc
L1 P Cache (C64x+)
PCI Address Space
CS2 - NAND Flash
VLYNQ
DDR2
)
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