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Spectrum Digital TMS320F240 Technical Reference

Evaluation module
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TMS320F240
Evaluation Module
Technical
Reference
1998
DSP Development Systems

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Summary of Contents for Spectrum Digital TMS320F240

  • Page 1 TMS320F240 Evaluation Module Technical Reference 1998 DSP Development Systems...
  • Page 2 TMS320F240 Evaluation Module Technical Reference 503279-0001 Rev. C June 1998 SPECTRUM DIGITAL, INC. 10853 Rockley Road Houston, TX. 77099 Tel: 281/561-6952 Fax: 281/561-6037 sales@spectrumdigital.com www.spectrumdigital.com...

  • Page 3: Important Notice

    IMPORTANT NOTICE Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue any product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current.
  • Page 4 1.1 Key Features of the TMS320F240 EVM ........1.2 Functional Overview of the TMS320F240 EVM ....... .
  • Page 5 A TMS320F240 EVM PAL Equations ........
  • Page 6 (EVM). The EVM is based on the Texas Instruments TMS320F240 Digital Signal Processor. The TMS320F240 EVM is a table top card to allow engineers and software developers to evaluate certain characteristics of the TMS320F240 DSP to determine if the processor meets the designers application requirements.
  • Page 7 This chapter provides you with a description of the TMS32F240 Evaluation Module along with the key features and a block diagram of the circuit board. Topic Page Overview of the TMS320F240 EVM Key Features of the TMS320F240 EVM Functional Overview of the TMS320F240 EVM...
  • Page 8 F240 family of processors. The F240 EVM is shipped with a TMS320F240 DSP however other family members can be placed in the on board socket as they become available. The EVM allows full speed verification of F240 code.
  • Page 9 Spectrum Digital, Inc 1.2 Functional Overview of the TMS320F240 EVM Figure 1-1 shows a block diagram of the basic configuration for the F240 EVM. The major interfaces of the EVM include the target ram and rom interface, target UART, analog interface, and expansion interface.
  • Page 10 Spectrum Digital, Inc TMS320F240 Evaluation Module Technical Reference...
  • Page 11 Chapter 2 Operation of the TMS320F240 Evaluation Module This chapter describes the operation of the TMS32F240 Evaluation Module along with the key interfaces and an outline of the circuit board. Topic Page The TMS320F240 EVM Operation The TMS320F240 EVM Board 2.1.1...
  • Page 12 2.10.12 Jumper JP12, Enable/Disable Memory Mapping 2-24 2.10.13 Jumper JP13, Not Used 2-24 2.10.14 Jumper JP14, Enable/Disable Onboard FLASH 2-24 2.10.15 Jumper JP15, Onboard UART CTS Routing Jumper 2-25 2.11 LEDS 2-25 2.12 Resets 2-25 2.13 Test Point 2-25 TMS320F240 Evaluation Module Technical Reference...
  • Page 13 Spectrum Digital, Inc 2.0 The TMS320F240 EVM Operation This chapter describes the F240 Evaluation module, its key components, and how they operate. It also provides information on the EVM’s various interfaces.The F240 EVM consists of six major blocks of logic.
  • Page 14 For more information on the memory in the device populated in your EVM card please refer to Texas Instruments TMS320F240 Users Guide. Futhermore, it is important to take into account that external memory is affected by wait-states. Wait state generation for off-chip memory space (data, program, or I/O) is done with the Wait State Generation Register(WSGR).
  • Page 15 Spectrum Digital, Inc CLKOUT ADDRESS DATA READ WRITE STRB- RAMOE- RAMWE- Zero Wait State Memory Timing The external Flash ROM is mapped into the program space. Note that this memory requires multiple wait states. The main purpose of this memory is to allow for the boot loading of programs without the need of programming the processors internal flash.
  • Page 16 Table 1: FLASH/RAM CONFIGURATION UART MCR BITs FUNCTION D3(Out2) D2(Out1) READ WRITE FLASH* FLASH FLASH * Power up configuration Note: The bits in the MCR register are inverted from what appears on the output pins. TMS320F240 Evaluation Module Technical Reference...
  • Page 17 Spectrum Digital, Inc Shown below are the four program memory configurations: Program Space Program Space MP/MC- = 0, JP2(2-3) MP/MC- = 1, JP2(1-2) Microprocessor Mode Microcomputer Mode External FLASH, JP14(2-3) External FLASH, JP14(2-3) 0000 Interrupts Interrupts 0000 (On-chip) (On-chip) 003F...

  • Page 18: Data Memory

    0500 07FF 0800 Illegal 6FFF Peripheral Memory- 7000 Mapped Registers (System, ADC, SCI, 73FF SPI, I/O, Interrupts) Peripheral Memory- 7400 Mapped Registers 743F (Event Manager) 7440 Reserved 77FF 7800 Illegal 7FFF 8000 External RAM FFFF TMS320F240 Evaluation Module Technical Reference...
  • Page 19 FFFF 2.3 Onboard UART The TMS320F240 EVM has a TL16C550 UART mapped into the I/O space of the F240 at locations 0x0010 - 0x0018. The UART allows users to use this resource for data logging, code debugging or other application features. Appendix C contains the programming information for the TL16C550 device.
  • Page 20 Spectrum Digital, Inc 2.5 Digital to Analog Converter The TMS320F240 EVM provides four(4) 12-bit D/A channels. The output is from 0 to 5 volts DC. The converter is mapped into I/O address space 0x0000 to 0x0004. Locations 0x0000 through 0x0003 are used for the data holding registers for channels 1-4 respectively.
  • Page 21 Spectrum Digital, Inc 2.6.1.1 Expansion I/O Connector The definition of P1, which has the I/O signals is shown below. Table 3: P1 I/O Pin # Signal Pin # Signal VCC, +5 Volts VCC, +5 Volts PWM1/CMP1 PWM2/CMP2 PWM3/CMP3 PWM4/CMP4 PWM5/CMP5...
  • Page 22 VCCA, +5V Analog ADCIN0/IOPA0 ADCIN1/IOPA1 ADCIN2 ADCIN3 ADCIN4 ADCIN5 ADCIN6 ADCIN7 ADCIN8/IOPA3 ADCIN9/IOPA2 ADCIN10 ADCIN11 ADCIN12 ADCIN13 AGND AGND ADCIN14 ADCIN15 VREFHI VREFLO AGND AGND DACOUT1 DACOUT2 DACOUT3 DACOUT4 RESERVED RESERVED RESERVED ADCSOC/IOPC0 AGND AGND TMS320F240 Evaluation Module Technical Reference 2-12...
  • Page 23 Spectrum Digital, Inc 2.6.1.3 Expansion Address and Data Connector The definition of P3, which has the address and data signals is shown below. Table 5: P3 Address/Data Pin # Signal Pin # Signal 2-13...
  • Page 24 Table 6: P4 Control Pin # Signal Pin # Signal VCC, +5 Volts VCC, +5 Volts W/R- STRB- READY RESERVED TRGRESET- NMI- XINT1- XINT2-/IO XINT3-/IO RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED CLKIN CLKOUT/IOPC1 TMS320F240 Evaluation Module Technical Reference 2-14...
  • Page 25 Spectrum Digital, Inc 2.7 JTAG Interface. The TMS320F240 Evaluation Module is supplied with a 14 pin header interface, P5. This is the standard interface used by JTAG emulators to interface to Texas Instruments DSPs. The pinout for the connector is shown below:...
  • Page 26 Spectrum Digital, Inc 2.8 On-Chip Asynchronous Serial Port The TMS320F240 DSP has an on-chip asynchronous serial port. This port is brought out to connector P6 on the EVM320F240. Connector P6 is a DB9 female connector. This RS232 connector allows the user to connect an external instrument or computer to the EVM320F240.
  • Page 27 Spectrum Digital, Inc 2.9 Onboard Serial Interface The EVM320F240 has a TL16C550 UART which provides an additional serial interface. This UART is mapped into I/O space at locations 0x0010 to 0x0018. This device allows users to use this resource for data logging, code debugging and other applications.
  • Page 28 1 x 3 Onboard UART CTS Routing Each jumper on the TMS320F240 EVM is a 1x3 jumper. Each jumper must have the selection 1-2 or 2-3. The #2 pin is the center pin. The #1 pin has a square solder pad and can be seen from the solder side of the printed circuit board.
  • Page 29 Spectrum Digital, Inc 2.10.1 Jumper JP1, Enable/Disable Flash Programming Jumper JP1 is connected to the VCCP pin of the TMS320F240. On the F240 device this pin enables the programming of the internal flash memory. It also allows disabling the watchdog timer module. Refer to the F240 User’s Guide for the programming sequence to disable the watchdog timer.
  • Page 30 Spectrum Digital, Inc 2.10.3 Jumper JP3, Oscillator Source Select Jumper JP3 is used to select the source of the TMS320F240 Clockin. Jumper position 1-2 selects the onboard oscillator. If position 2-3 is used the clock is from pin 31 on the Control connector P4.
  • Page 31 DSP SCIRXD/IO 2.10.6 Jumper JP6, VREFHI Select Jumper JP6 is used to select the source for the VREFHI pin on the TMS320F240. Position 1-2 selects the VCCA power which is +5 volts. If position 2-3 is used trim pot R34 is used which allows a variable VREF High from 0-5 volts.
  • Page 32 Spectrum Digital, Inc 2.10.7 Jumper JP7, VREFLO Select Jumper JP7 is used to select the source for the VREFLO pin on the TMS320F240. Position 1-2 selects the Analog ground. If position 2-3 is used trim pot R23 is used The table below shows the positions and their functions:...
  • Page 33 Jumper JP9 is used to select the source for the memory’s A15 signal. When position 1-2 is used the TMS320F240’s A15 is used. The 2-3 position selects a mapping signal from PAL U19. Refer to the memory section for details. The table below shows the...
  • Page 34 1-2 disables it. Refer to the Program Memory Section for the use of this feature. The table below shows the positions and their functions: Table 21: Jumper J14 Position Function Disables onboard flash memory Enables onboard flash memory TMS320F240 Evaluation Module Technical Reference 2-24...
  • Page 35 TMS320F240. There is also a system reset RS- which is both input and output from the TMS320F240. Internal conditions such as a watchdog time-out will cause the RS- pin to go low.
  • Page 36 Spectrum Digital, Inc TMS320F240 Evaluation Module Technical Reference 2-26...
  • Page 37 Printed in U.S.A., June 1998 503279-0001 Rev. C...