System Connections And Jumpers; Table 4. System Connections - Cirrus Logic CDB43L22 Manual

5. SYSTEM CONNECTIONS AND JUMPERS

CONNECTOR
VP
GND
USB
S/PDIF OPTICAL IN
S/PDIF COAX IN
I/O Header
S/W CONTROL
MICRO JTAG
FPGA JTAG
MICRO RESET
FPGA PROGRAM
H/W BOARD RESET
AIN1
AIN2
AIN3
AIN4
A(RC LPF)
B(RC LPF)
SPEAKER A-
SPEAKER A+
SPEAKER B-
SPEAKER B+
HP/Line Output
HP Connect
I/O HDR
DS792DB1
REF INPUT/OUTPUT
J35 Input
J4 Input
J94 Input/Output
OPT3 Input
J61 Input
J8 Input/Output
J109 Input/Output
J110 Input/Output
J75 Input/Output
S4 Input
S2 Input
S1 Input
J33 Input
J37 Input
J45 Input
J50 Input
J6 Output
J18 Output
J60 Output
J59 Output
J101 Output
J99 Output
J40 Output
J21 Output
J78 Input/Output

Table 4. System Connections

SIGNAL PRESENT
+2.7 V to +5.25 V Power Supply.
Ground Reference.
USB connection to PC for I²C control port signals.
CS8416 digital audio input via optical cable.
CS8416 digital audio input via coaxial cable.
I/O for Clocks & Data directly to/from the CS43L22.
I/O for external I²C control port signals.
I/O for programming the micro controller (U84).
I/O for programming the FPGA (U5).
Reset for the micro controller (U84).
Reload Xilinx program into the FPGA from Flash (U14).
Reset for the CS43L22(U1).
1/8" audio jacks for analog passthrough input signal to CS43L22.
1/8" audio jacks for Line or MIC analog passthrough input signals to
CS43L22.
30 kHz LPF version of the signal on speaker binding posts (Used for mea-
surement purposes only).
Full Bridge speaker outputs.
Stereo 1/8" jack for line outputs. When headphones are plugged in to HP
Connect (on J21), this output may be used for performance measure-
ment.
Stereo headphone jack for Headphone outputs.
I/O for clocks and input for DAC SDIN. Signals are passed through the
FPGA for muxing with the S/PDIF input.
CDB43L22
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