October 2019
Figure 1-8: Integral autocal and HART communications
A. Ferrite clamp
B. Signal
C. Test points
D. #8 pan htd scr (internal ground)
E. Power
F. Test point group
Note
A. Except for JP5, JP7, and JP8 on IO board, jumper and switch settings are factory set and are
shown for reference only.
B. IO board: 4-20 mA/HART loop power settings
•
JP5
Quick Start Guide
Quick Start Guide
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