Buffer Memory Area - Pepperl+Fuchs CC-LINK Series Compact Manual

CC-Link Gateways
Data transmission modes of the CC-Link Gateways
6.1.2

Buffer memory area

Buffer memory
for master without integr. safety monitor
Address
0 ... 7
8 ... 15
16 ... 23
Buffer memory (read)
for master with integr. safety monitor
Address
RWrm0
RWrm1
RWrm2 AS-i 1: Inp. Slv11 AS-i 1: Inp. Slv10 AS-i 1: Inp. Slv9
RWrm3 AS-i 1: Inp. Slv15 AS-i 1: Inp. Slv14 AS-i 1: Inp. Slv13 AS-i 1: Inp. Slv12
RWrm4 AS-i 1: Inp. Slv19 AS-i 1: Inp. Slv18 AS-i 1: Inp. Slv17 AS-i 1: Inp. Slv16
RWrm5 AS-i 1: Inp. Slv23 AS-i 1: Inp. Slv22 AS-i 1: Inp. Slv21 AS-i 1: Inp. Slv20
RWrm6 AS-i 1: Inp. Slv27 AS-i 1: Inp. Slv26 AS-i 1: Inp. Slv25 AS-i 1: Inp. Slv24
RWrm7 AS-i 1: Inp. Slv31 AS-i 1: Inp. Slv30 AS-i 1: Inp. Slv29 AS-i 1: Inp. Slv28
RWrm8 AS-i 1: Inp. Slv3B AS-i 1: Inp. Slv2B AS-i 1: Inp. Slv1B
RWrm9 AS-i 1: Inp. Slv7B AS-i 1: Inp. Slv6B AS-i 1: Inp. Slv5B AS-i 1: Inp. Slv4B
RWrm10
RWrm11
RWrm12
RWrm13
RWrm14
RWrm15
RWrm16
RWrm17
RWrm18
RWrm19
read
AS-i 1, input A + single slaves
AS-i 1, input B slaves
Bit 15 ... 12 Bit 11 ... 8
AS-i 1: Inp. Slv3 AS-i 1: Inp. Slv2
AS-i 1: Inp. Slv7 AS-i 1: Inp. Slv6
AS-i 1: AS-i 1:
Inp. Slv11B Inp. Slv10B
AS-i 1: AS-i 1:
Inp. Slv15B Inp. Slv14B
AS-i 1: AS-i 1:
Inp. Slv19B Inp. Slv18B
AS-i 1: AS-i 1:
Inp. Slv23B Inp. Slv22B
AS-i 1: Inp. AS-i 1: Inp.
Slv27B Slv26B
AS-i 1: AS-i 1:
Inp. Slv31B Inp. Slv30B
fieldbus bits 15 ... 8
Safety Status OSSD2
Safety Status OSSD4
Safety Status OSSD6
1 Master
write
AS-i 1, output A + single slaves
AS-i 1, output B slaves
reserved
Bit 7 ... 4
AS-i 1: Inp. Slv1
AS-i 1: Inp. Slv5
AS-i 1:
Inp. Slv9B
AS-i 1:
Inp. Slv13B
AS-i 1:
Inp. Slv17B
AS-i 1:
Inp. Slv21B
AS-i 1: Inp.
Slv25B
AS-i 1:
Inp. Slv29B
fieldbus bits 7 ... 0
Safety Status OSSD1
Safety Status OSSD3
Safety Status OSSD5
Tab. 6-6.
Bit 3 ... 0
flags AS-i 1
AS-i 1: Inp. Slv4
AS-i 1: Inp. Slv8
AS-i 1:
Inp. Slv8B
AS-i 1:
Inp. Slv12B
AS-i 1:
Inp. Slv16B
AS-i 1:
Inp. Slv20B
AS-i 1: Inp.
Slv24B
AS-i 1:
Inp. Slv28B
Tab. 6-7.
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