2 INSTRUCTION TABLES
2)
2:The number of steps may vary depending on the device and type of CPU module being
used.
Component
High Performance model QCPU
Process CPU
Basic model QCPU
QnCPU
Note 1:With High Performance module QCPU, (1) requires more number of steps, while it can
process the steps faster, as compared with (2).
Note 2:The number of steps may increase due to the conditions described in Section 3.8.
3)
3 : The subset is effective only with QCPU.
2.5.2 Rotation instructions
Category
ROR
RORP
Right
rotation
RCR
RCRP
ROL
ROLP
Left
rotation
RCL
RCLP
DROR
DRORP
Right
rotation
DRCR
DRCRP
DROL
DROLP
Left
rotation
DRCL
DRCLP
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(1) When using the following devices only
• Word device : Internal device (except for file register ZR)
• Bit device : Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no index modification.
• Constant : No limitations
(2) When using devices other than (1)
Table 2.19 Rotation Instructions
Symbol
b15
ROR
D
n
RORP
D
n
Rotates n bits to the right
b15
RCR
D
n
RCRP
D
n
Rotates n bits to the right
SM700
ROL
D
n
ROLP
D
n
SM700
RCL
D
n
RCLP
D
n
DROR
D
n
b31
DRORP
D
n
Rotates n bits to the right
DRCR
D
n
b31
DRCRP
D
n
Rotates n bits to the right
DROL
D
n
SM700
DROLP
D
n
DRCL
D
n
SM700
DRCLP
D
n
Nomber of basic steps
4
Processing Details
(D)
b0
SM700
(D)
b0
SM700
b15
(D)
b0
Rotates n bits to the left
b15
(D)
b0
Rotates n bits to the left
(D+1)
(D)
SM700
to
b16
b15 to
b0
(D+1)
(D)
SM700
to
b16
b15 to
b0
(D+1)
(D)
b31
to
b16
b15 to
b0
Rotates n bits to the left
(D+1)
(D)
b31
to
b16
b15 to
b0
Rotates n bits to the left
MELSEC-Q/QnA
Note 1)
6
Note 2)
4
Note 2)
Execution
Condition
3
7-30
3
7-30
3
7-32
3
7-32
3
7-34
3
7-34
3
7-36
3
7-36
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