Motorola MC6805R Series Advance Information page 68

Table 10-5. Control Instructions
Inherent
Op
# #
Function Mnemonic Code Bytes Cycles
Transfer A to X TAX 97 1 2
Transfer X to A TXA 9F
1 2
Set Carry Bit SEC 99 1 2
Clear Carry Bit
CLC 98
1
2
Set Interrupt Mask Bit
SEI 9B 1 2
Clear Interrupt Mask Bit CLI 9A
1 2
Software Interrupt SWI 83 1 11
Return from Subroutine RTS 81 1 6
Return from Interrupt RTI 80 1 9
Reset Stack Pointer RSP
9C 1 2
No-Operation
NOP
9D 1 2
Table 10-6. Instruction Set (Sheet 1 of 2)
Addressing Modes
I
Bit
I
Indexed Indexed Indexed Setl
I
~Mneml
Inherent' Immediate Direct Extended Relative (No Offset) (8 Bits) (16 Bits) Clear
ADC
X
ADD
X
AND
X
ASL
X
ASR X
BCC
BCLR
BCS
BEQ
BHCC
BHCS
BHI
BHS
BIH
BIL
BIT X
BLO
BLS
BMC
BMI
BMS
BNE
BPL
BRA
Condition Code Symbols:
H Half Carry (From Bit 3)
I Interrupt Mask
N Negative (Sign Bit)
Z Zero
X
X
I
X
X
X
X
X X X
X
X X
X
X X
X X
·X X
X
X
X
X
X
X
X
X
X
X X
X
X
X
X
X
X
X
X
X
C Carry/Borrow
/\ Test and Set if True, Cleared Otherwise
• Not Affected
10-8
X
X
X
X
X
iCondition Codel
Bit
I
Test &
!
Branch H I N Z
C
I
/\
•
/\
/\ /\
/\
•
/\
/\
/\,
• •
/\ /\
•
• •
/\ /\
/\
• •
/\ /\ /\
• • • • •
• • • • •
• • • • •
• • • • •
• • • •
.'
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• •
/\ /\
•
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • •
.,
• • • •
.: