Motorola MC6805R Series Advance Information page 19

SECTION 3
MEMORY CONFIGURATIONS
Each member of the MC68(7)05R/U series of microcomputers is capable of addressing 4096 bytes
of memory and 1/0 registers. The memory maps for the eight versions of the M6805 Family describ-
ed in this document are shown in Figures 3-1 through 3-6~ The amount of ROM, EPROM, and RAM
for each device is detailed in
1.1
DEVICE FEATURES.
3.1 MC6805U2 MEMORY MAP
The memory map for the MC6805U2is shown in Figure 3-1. From $FF8 to $FFF are the interrupt
and RESET vectors. A self-check ROM occupies 192 bytes from $F38 to $FF7. The user ROM is
Page Zero
Access with
Short
Instructions
Interrupt
Vectors
7
000
127
128
255
256
1983
1984
3895
3896
4087
~
-
1/0
Ports
Timer
RAM
(128 Bytes)
Page-Zero
User ROM
(128 Bytes)
Not Used
(1728 Bytes)
Main User
ROM
(1912 Bytes)
Self-Check
ROM
(192 Bytes)
- -
-
-
-
4088
4089
Timer Interrupt
4090
4091
4092
I-
- -
-
-
-
-
External Interrupt
I- -
- - -
- -
SWI
4093
4094
I- -
-
--
- -
4095
RESET
o
7 6 5 4 3 2 1 0
$000
0
Port A Data Register
1
Port B Data Register
$07F
2 Port C Data Register
$080
3
Port D Data Register
4
PortA DDR*
$OFF
5
Port B DDR*
$100
6
PortC DDR*
\
7
Not Used
$7BF
8
Timer Data Register
$7CO
9 Timer Control Register
10
Miscellaneous Register
11
$F37
15
Not Used
$F38
16
Reserved
(48 Bytes)
$FF7
$FF8
63
$FF9
64
RAM
$FFA
(64 Bytes)
$FFB
$FFC
Stack
$FFD
(31 Bytes
Maximum)
$FFE
t
$FFF
127
*Caution: Data direction registers (DDRs) are write-only; they read as $FF.
Figure
3-1.
MC6805U2 Memory Map
3-1
$000
$001
$002
$003
$004*
$005*
$006*
$007
$008
$009
$ooA
$ooB
$OOF
$020
$03F
$040
$07F