Motorola MC6805R Series Advance Information page 67

Table 10-3. Branch Instructions
Relative Addressing Mode
op
#
#
Function Mnemonic Code Bytes Cycles
Branch Always BRA 20 2 4
Branch Never BRN
21
2
4
Branch IFF Higher BHI
22
2 4
Branch IFF Lower or Same BLS 23
2
4
Branch IFF Carry Clear BCC
24
2 4
(Branch IFF Higher or Same)
(BHS)
24 2 4
Branch IFF Carry Set BCS 25 2
4
(Branch IFF Lower)
(BLO)
25 2 4
Branch IFF Not Equal BNE 26 2
4
Branch IFF Equal BEQ 27 2 4
Branch IFF Half Carry Clear BHCC 28 2 4
Branch IFF Half Carry Set BHCS 29 2
4
Branch IFF Plus BPL 2A 2 4
Branch IFF Minus BMI 2B 2
4
Branch IFF Interrupt Mask
Bit is Clear BMC 2C
2
4
Branch IFF Interrupt Mask
Bit is Set BMS 2D 2 4
Branch IFF Interrupt Line
is Low BIL 2E 2
4
Branch IFF Interrupt Line
is High
BIH
2F
2
4
Branch to Subroutine BSR AD 2 8
Table 10-4. Bit Manipulation Instructions
Addressing Modes
Bit
Setl
Clear Bit Test and Branch
op
# #
op
# #
Function Mnemonic Code Bytes Cycles
Code
Bytes Cycles
Branch IFF Bit n is Set BRSET n(n=O ... 7)
- -
-
2-n 3 10
Branch IFF Bit n is Clear
BRCLR n(n=O ... 7)
-
-
-
01 +2-n 3 10
Set Bit n BSET n(n:;:O ... 7)
10+2-n
2
7
-
- -
Clear Bit n BCLR n(n=O ... 7)
11 +2-n 2 7
-
-
-
10-7