Motorola MC6805R Series Advance Information page 7

Figure
Number
1-1
1-2
1-3
1-4
1-5
1-6
3-1
3-2
3-3
3-4
3-5
3-6
3-7
LIST OF ILLUSTRATIONS
Page
Title Number
MC6805R2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-3
MC6805U2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-3
MC6805R3 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-4
MC6805U3 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-4
MC68705R3 and MC68705R5 Block Diagram ......................... " 1-5
MC68705U3 and MC68705U5 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . .. 1-5
MC6805U2 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-1
MC6805R2 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-2
MC6805U3 Memory Map .......................................... " 3-3
MC6805R3 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-4
MC68705U3 and MC68705U5 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-5
MC68705R3 and MC68705R5 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-6
Interrupt Stacking Order .......................................... .. 3-7
4-1 Programming Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
5-1 MC6805R21 MC6805U2 Timer Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . ..
5-1
5-2 MC6805R3/MC6805U3 Timer Block Diagram ......................... " 5-3
5-3 MC68705R3/MC68705U3 Timer Block Diagram. . . . . . . . . . . . . . . . . . . . . . . .. 5-6
5-4 MC68705R5/MC68705U5 Timer Block Diagram. . . . . . . . . . . . . . . . . . . . . . . .. 5-7
6-1 Self-Check Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-2
7-1 Typical Reset Schmitt Trigger Hysteresis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-1
7-2 Power and Reset Timing ......................... ;.................. 7-1
7-3 RESET Configuration ....................................... , . . . . . .. 7-2
7-4 Clock Generator Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .. 7-3
7-5 Crystal Motional-Arm Parameters and Suggested PC Board Layout ...... " 7-4
7-6 Typical Frequency Selection for Resistor (RC Oscillator Option) ........... 7-4
7-7 Reset and Interrupt Processing Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-5
7-8 Typical Interrupt Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-6
8-1 Typical Port
110
Circuitry ..................... , .................... " 8-1
8-2 Typical Port Connections. . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . .. 8-2
8-3 AID Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-4
8-4 Effective Analog Input Impedance (During Sampling Only) ............... 8-5
8-5 Ideal Converter Transfer Characteristic .... . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-5
8-6 Types of Conversion Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-6
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