10:20 Channels - IBM System/370 Manual

Page of GC20-1730-0
Revised 7/14/70
By TNL GN20-2227
If an equal compare occurs for an address in one of the registers in
the address array and the valid trigger for that block is on in the
buffer, the appropriate doubleword from the buffer block is sent to
the CPU as determined by bits 27 and 28 of the processor storage
address. A processor storage reference is not made. The referenced
buffer block is put at the top of its column activity list in the
replacement array.
If the desired data block is not in the buffer column interrogated,
the requested data must be fetched from processor storage, sent to
the CPU, and stored in the buffer. The replacement array entry for
the column involved is inspected and the buffer block at the bottom
of the activity list is assigned to receive the requested data from
processor storage. Four processor storage references, one cycle apart,
are made to obtain the 32 consecutive bytes and place them in the
assigned buffer block. The valid trigger for the buffer block is set
on and the 13 high-order processor storage address bits are placed
in the appropriate column within the address array. The first
doubleword fetched from processor storage is the one containing the
data required by the CPU. It is sent to the CPU as well as to the
buffer so that processing can continue as soon as possible.
Assuming no channel interference, a 32-byte buffer block can be
filled from processor storage in 1.44 microseconds (or 18 cycles) with
four-way interleaving utilized. One buffer block can be loaded every
2 microseconds (25 cycles), assuming no interference.
10: 20 CHANNELS
GENERAL DESCRIPTION
The channels available on a System/370 Model 165 are functionally
compatible with those of System/360 models. Combinations of 2870
Multiplexer, 2860 Selector, and 2880 Block Multiplexer channels can
be attached to a Model 165. If the Extended Channels special feature
is installed, up to twelve channels can be connected to a single Model
165 to provide an aggregate channel data rate in excess of nine
megabytes, twice the rate possible on a Model 65.
The 2870 and 2860 channels that attach to the Model 165 are the
same as those used on a Model 65 but have minor hardware changes (as
is true when these channels are attached to System/360 Models 75 and
up). When a Model 165 replaces a Model 65 or 75, the 2870/Model 165
and 2860/Model 165 features can be field installed on the existing
2870 and 2860 channels, respectively, so that the latter can be attached
to the Model 165.
The standard number of addressable channels permitted on a Model
165 is seven. Any combination of one or two 2870 Multiplexer, up to
six 2860 Selector, and up to six 2880 Block Multiplexer channels can
be attached up to the limit of seven channels. If the optional Extended
Channels feature is installed, the maximum number of each type of
channel that can be included in the twelve channels permitted is:
• 2870 Multiplexer - two. (The first must have address 0, the second
can be assigned an address from 1 to 6.>
• 2860 Selector - six. (Addresses 1 through 6 can be assigned.)
• 2880 Block Multiplexer - eleven. (Addresses 1 through 11 can be
assigned. )
Model 165 channels are not integrated with the CPU. Channels compete
with each other and the CPU only for processor storage accesses and,
therefore, cause a minimum of CPU interference. A 2870, 2860, or 2880
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