IBM System/370 Manual page 93

is referenced directly. If the retry is successful, operations continue
as usual. An interrupt occurs to indicate a successful CPU retry.
The fact that a buffer failure occurred is indicated as well.
CPU retry is accomplished by additional microprogram routines and
hardware included in the Model 165. The failing CPU operation is
retried by the microprogram up to seven times before it is determined
that the error is uncorrectable. Most instructions must be completely
reexecuted. Therefore, all data required for a retry is saved by the
execution microprogram. However, certain SS-format instructions will
be retried from the point of successful execution. In this case, the
execution microprogram saves the status data necessary to restart at
the proper byte.
When enabled, a machine check interrupt takes place after a CPU
error occurs and is retried. If CPU retry was successful, and no
buffer error occurred, the failure need only be recorded. If a buffer
failure caused the error or if the retry was unsuccessful, programmed
recovery procedures are required in addition to error recording.
The CPU retry feature provides the Model 165 with the ability to
recover from intermittent CPU failures that would otherwise cause a
system halt and necessitate a re-IPL or that would cause an executing
program to be terminated. Corrected errors are logged (by MCH) for
later diagnosis during scheduled maintenance periods. System
availability is thereby increased.
Retry of failing CPU operations on Models 65 and 75 is not provided
by system hardware. Instruction retry after a machine check is provided
for the Model 65 for some instructions by the machine check handler
(MCH) routine. (An MCH routine is not provided for the Model 75.)
ECC VALIDITY CHECKING ON PROCESSOR STORAGE
The ECC method of validity checking on processor storage provides
automatic single-bit error detection and correction. It also detects
all double-bit and most multiple-bit processor storage errors but does
not correct them. Checking is handled on an eight-byte basis, using
an eight-bit modified Hamming code, rather than on a single-byte basis
using a single parity bit. However, parity checking is still used
to verify other data in a Model 165 system that is not contained in
processor storage. Models 65 and 75 use parity checking for main
storage data verification.
71