IBM System/370 Manual page 95

An
ECC mode bit controls whether full recording or quiet mode is
in effect for corrected single-bit processor storage errors. When
quiet mode is in effect, a machine check interrupt does not occur after
the successful correction of a single-bit error.
The ECC feature increases Model 165 system availability by permitting
system operation to continue normally after single-bit storage errors
occur and are corrected. Any main storage errors on a Model 65 will
necessitate the termination of system operation or of the program
involved if the damaged program module cannot be refreshed. (Both
control program and user modules can be refreshed by Model 65 MCB.
Only SER routines are provided for the Model 15.)
I/O OPERATION RETRY
Channel retry, command retry, and CPU retry features are provided
to reduce the number of abnormal program terminations and unscheduled
system halts that occur because of channel errors.
• Channel Retry
This feature has been implemented to insure that most failing
channel operations can be retried by error-handling routines.
When a channel error (channel control or interface control check)
or a CPU error associated with a channel operation occurs, both
the channel status word (CSW) and channel logout data are stored
during the I/O interrupt.
Channel logout data for the Model 165 consists of 28 words. It
is stored beginning at the location pointed to in word 112 in the
fixed area if the I/O extended log mask is enabled. The channel
logout data provides additional, more exacting status information
about the channel failure. This data is formatted by the CCB
routine and passed to a device-dependent error recovery routine
to be used in the retry of the failing I/O operation.
• Command Retry
Command retry is a channel/control unit procedure that can cause
an improperly executed command in a channel program to be retried
automatically by hardware so that an I/O interrupt and programmed
error recovery are not required. An indication is presented when
the control unit recognizes this situation. The 2810 Multiplexer
and 2860 Selector channels will not perform a command retry.
The command retry feature is implemented in the control unit of
the 3330 and 2305 facilities and was discussed in Section 20.
• CPU Retry
If an error occurs during the execution of an I/O instruction,
such as START I/O, TEST I/O, TEST CHANNEL, etc., the hardware
determines whether or not the automatic CPU retry threshold for
the particular instruction has been passed. If instruction
execution has not gone beyond predetermined points, then
the instruction is retried automatically by the CPU retry hardware
without programming assistance. A machine check interrupt is taken
for recording purposes at the completion of a successful retry.
If the instruction cannot be retried because it has passed beyond
the retry threshold point, an I/O interrupt is taken and the
appropriate device-dependent error recovery routine is scheduled
to take the required recovery action. For example, if an error
in the execution of a START I/O instruction occurs before the I/O
device becomes involved, a CPU retry is possible.
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