M.2 Wlan Slot: Socket 1 Key E Type 2230 - Seco CCOMe-C30 User Manual

3.3.6

M.2 WLAN Slot: Socket 1 Key E Type 2230

M.2 WLAN Slot (Socket 1 Key E type 2230) - CN11
Pin Signal Pin
1 GND
3 USB6+
5 USB6-
7 GND
9 ---
11 ---
13 ---
15 ---
17 ---
19 ---
21 ---
23 ---
33 GND
35 PCIE_Tx1+
37 PCIE_Tx1-
39 GND
41 PCIE_Rx1+
43 PCIE_Rx1-
45 GND
47 PCIE_CLK1+
49 PCIE_CLK1-
51 GND
53 ---
55 M.2_WAKE#
57 GND
CCOMe-C30
CCOMe-C30 - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: S.B. - Reviewed by F.B. Copyright © 2019 SECO S.p.A.
Signal
2 +3.3V_A
4 +3.3V_A
6 ---
8 ---
10 ---
12 ---
14 ---
16 ---
18 GND
20 ---
22 ---
32 ---
34 ---
36 ---
38 ---
40 ---
42 ---
44 ---
46 ---
48 ---
50 ---
52 WiFi_RST#
54 W_DISABLE2_E#
56 W_DISABLE1_E#
58 ---
To add communications functionality, or other features not
available on CCOMe-C30 Carrier board, it is possible to use M.2
Socket 1 Key E connectivity modules (i.e. modules with
functionalities like WiFi + Bluetooth).
The connector used for the M.2 WLAN slot is CN11, which is a
standard 75 pin M.2 Key E connector, type LOTES p/n
APCI0076-P001A, H=4.2mm, with the pinout shown in the table
on the left.
On the CCOMe-C30 Carrier board there is also a Threaded Spacer which allows the placement
of M.2 Socket 1 Key E WLAN modules in 2230 size.
Signals carried to M.2 WLAN Slot are the following:
PCIE_TX1+/PCIE_TX1-: PCI Express lane #1, Transmitting Output Differential pair.
PCIE_RX1+/PCIE_RX1-: PCI Express lane #1, Receiving Input Differential pair.
PCIE_CLK1+ / PCIE_CLK1-: PCI Express Reference Clock for lane #1, Differential Pair.
USB6+ / USB6-: USB Port #6 differential pair.
M.2_WAKE#: Board's Wake Input, it must be externally driven by the M.2 WLAN module
inserted in the slot when it requires waking up the system. This signal is connected to COM
Express module's WAKE0# signal.
WiFi_RST#: WLAN specific reset Signal, derived from the CB_RESET signal sent from COM
Express module to all PCI-e devices available on the board.
PCIE_REQ1#: PCI Express Clock Request Input. This signal shall be driven low by the module
inserted in the M.2 WLAN slot, in order to ensure that the PCI-e clock buffer available on the
carrier board makes available the reference clock for this slot (i.e. PCIE_CLK1+/PCIE_CLK1-).
W_DISABLE1_E#: this signal can be used to enable/disable the WiFi functionality of a M.2
WLAN module plugged in slot CN11. This signal is directly managed using jumper JP14 as
described in the table below.
W_DISABLE2_E#: this signal can be used to enable/disable the BT functionality of a M.2 WLAN
module plugged in slot CN11. This signal is directly managed using jumper JP15, as described
in the table below.
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