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35
PEG_Tx1-
36
37
PEG_Tx1+
38
39
GND
40
41
PEG_Rx0-
42
43
PEG_Rx0+
44
45
GND
46
47
PEG_Tx0-
48
49
PEG_Tx0+
50
51
GND
52
53
NVME_CLK-
54
55
NVME_CLK+
56
57
GND
58
67
---
68
69
---
70
71
GND
72
73
GND
74
75
GND
CCOMe-C30
CCOMe-C30 - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: S.B. - Reviewed by F.B. Copyright © 2019 SECO S.p.A.
Differential Pair
---
NVME_RST#: Reset Signal.
---
CLK_REQ3#: PCI Express Clock Request Input, active low signal. This signal shall be driven
---
low by any module inserted in the connectivity slot, in order to ensure that the SoC makes
available the reference clock.
---
M.2_WAKE#: Board's Wake Input, it must be externally driven by the M.2 NVMe module
---
inserted in the slot when it requires waking up the system. This signal is connected to COM
---
Express module's WAKE0# signal.
---
NVME_RST#
---
M.2_WAKE#
---
---
---
+3.3V_S
+3.3V_S
+3.3V_S
38
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