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3. Interface Description
3.1.
Physical Description
The pin 1 ~ pin 44 are for IDE interface. The pin A ~ pin D are for option selection via physical jumpers.
Figure 3: The front view of 2.5" PATA (IDE) SSD 44-pin IDE Connector
3.2.
Pin Assignments
Signals whose source is the host is designated as inputs while signals that the Industrial 44-pin micro IDE Flash (2.5"
PATA (IDE) SSD) Disk sources are outputs. The pin assignments are listed in below table 7.
Pin No.
Signal Name
1
HRESET
HDB[7]
3
5
HDB[6]
7
HDB[5]
9
HDB[4]
11
HDB[3]
13
HDB[2]
15
HDB[1]
HDB[0]
17
GND
19
DMARQ
21
3
HIOW
23
4
STOP
3
HIOR
4
HDMARDY
25
4
HSTROBE
3
IORDY
4
27
DDMARDY
4
DSTROBE
80000-FLD25-xxx(M/G)UH1(I)-March2011
Table 7: Pin Assignments
Description
Host Reset
Host Data Bit 7
Host Data Bit 6
Host Data Bit 5
Host Data Bit 4
Host Data Bit 3
Host Data Bit 2
Host Data Bit 1
Host Data Bit 0
Ground
DMA Request
Host I/O Write
Stop Ultra DMA burst
Host I/O Read
Ultra DMA ready
Ultra DMA data strobe
I/O Ready
Ultra DMA ready
Ultra DMA data strobe
Pin No.
Pin Name
GND
Ground
2
HDB[8]
Host Data Bit 8
4
6
HDB[9]
Host Data Bit 9
8
HDB[10]
Host Data Bit 10
10
HDB[11]
Host Data Bit 11
12
HDB[12]
Host Data Bit 12
14
HDB[13]
Host Data Bit 13
16
HDB[14]
Host Data Bit 14
HDB[15]
Host Data Bit 15
18
1
KEY
Key-pin
20
GND
Ground
22
24
24
GND
26
GND
Ground
28
CSEL
Cable select
QDFLD25‐xxx(M/G)UH1(I)
Datasheet
Description
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