HP 5065A Operating And Service Manual page 242

Rubidium vapor frequency standard
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Model 5065A
Circuit Diagrams, Theory, and Maintenance
A5 MAINTENANCE
Troubleshooting Table
NORMAL OPERATION
Digital divider circuits provide one pulse-per-second
output ticks available at front and rear panel 1 PPS BNC
output jacks.
The divider drive is an internally con­
nected 1 MHz signal from Frequency Divider Assembly
A6.
Option 001 circuits also provide drive for front
panel digital clock.
OPERATIONAL CHECK
Complete operational check is given in Table 5-2,
item 7.
TROUBLESHOOTING
The entire digital divider assembly may be removed and
reconnected for troubleshooting.
Extender board (HP
Part No. 05061-6073) furnished, makes circuit board
—components available for testing.
Digital divider power supply common is isolated from
instrument common. To observe waveforms and meas­
u r e divider voltages, divider common may be connected
to instrument common for troubleshooting with no ad­
verse effect. However, this connection must be removed
_when divider is reassembled.
Each circuit board inputs and outputs are available on
interconnection board assembly A5A5. Thus, trouble
_may be isolated to one specific board assembly before
disassembling the entire unit.
Troubleshooting table
and
schematic
diagrams
provide
troubleshooting
information.
Periodic adjustments to divider circuits are not neces­
sary. When adjustable components or components re­
lated to adjustable components are replaced, the fol­
l o w i n g adjustments should be made.
a. A5A2T1
Adjustment.
With
instrument
in
normal operation (frequency divider on) connect RMS
Voltmeter to A5A2T1 secondary.
Adjust A5A2T1 for
maximum voltage indication on voltmeter.
b. A5A2C9
Adjustment.
With
instrument
in
normal operation (frequency divider on) connect oscil-
'oscope to A5A2Q6 collector. Adjust A5A2C9 for most
symmetrical square wave observed on oscilloscope.
c. A5A2C10 Adjustment.
With
instrument
in
lormal operation (frequency dividers on) set TIME DE-
.AY thumbwheel switch to "000000" and 0-1 jisec TIME
"DELAY adjust to max. cw.
Externally synchronize
digital divider circuits (Paragraph 3-23). Using an oscil-
oscope, compare external synchronization pulse with 1
__'PS output pulse. Adjust A5A2C10 for 10jisec 1 PPS de­
lay + 1 Msec.
Will not synchronize
to external pulse.
Incorrect output pulse
shape.
TIME DELAY switch
does not affect output
pulse time delay.
Check external pulse
characteristics (Table
1-3). Check sync cir
cuitry A5A2 (Q3, IC1,
Q5, andQ7).
Check output circuits
(A16) A5A4(IC1,Q1),
(Q7andQ10),and
13.3 V supply (A16).
Check each switch posi­
tion (Table 5-2, Item 7).
If symptom is in only 1
or 2 switch positions,
check preset circuitry
associated with those
positions including pre­
set coupling diodes and
the associated decade.
If symptoms are present
regardless of thumb­
wheel settings, refer to
Table 5-6.
If output stops only
when thumbwheel
setting is "999999"
trouble is probably in
A5A3(IC13,IC12B, or
IC2D).
MODULE REPLACEMENT
No adjustments required when Digital Divider Assembly
or circuit board assemblies are replaced.
O TO I SEC
I
" — D E L A Y
H
I PPS PULSES
-=TL
T\.
MASTER
CLOCK
DELAY
PRESET
INFORMATION
PRESET
CLOCK
VARIABLE
DELAY
IPPS
DELAYED
"TICK"
PULSES
0 TO I /iSEC
U - D E L A Y - ^
I
I
8-31

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