HP 5065A Operating And Service Manual page 201

Model 5065A
Circuit Diagrams, Theory, and Maintenance
UNIT THEORY OF OPERATION
THE PRESET DIVIDER
Synthesizer Assembly A1
Synthesizer Assembly A1 produces a 5.315...MHz signal
that is mixed with 6840 MHz in a step-recovery diode
producing the 6,834,685 Hz microwave field which
excites the rubidium vapor cell in a resonant microwave
cavity of RVFR Assembly A12. Synthesizer frequency
is adjustable by the TIME SCALE thumbwheel switches
and the HI/LO slide switch on A1 Assembly. (These
controls can be seen with the unit top cover removed.)
Output frequencies corresponding to thumbwheel and
slide switch settings are in Table 3-6 under OPERATION.
The thumbwheel switch setting for A1 operation is
listed on the RVFR decal (for access, remove 5065A top
cover). The thumbwheel switch setting for UTC (Uni­
versal Time) is listed on the front panel door.
The following illustration shows the synthesizing
technique for the required 5.315...MHz output. The 5
MHz input is first digitally divided in the preset divider
according to the setting of th thumbwheel switches to
produce the " n " of the rational fraction m/n which ex­
presses the multiplier ratio for the required synthesizer
output. Preset divider output pulses are first sharpened
in a blocking oscillator; then applied to a harmonic
sampler circuit.
Synthesizer Multiplication Technique
5.3I5....MHZ
5MHz
THUMBWHEEL
SAMPLING CIRCUIT
SWITCH
'WWV-
A
"
/
\ / \ / \ y \ 5.3I5....MHI
j \ _ 5MHz SAMPLING
n PULSES
In the harmonic sampler circuit, the 5 MHz/n frequency
is compared with the nominal 5.315 MHz frequency of
the voltage controlled oscillator. This action produces
a dc steering voltage which controls the variable fre­
quency oscillator to synchronize its "m" harmonic with
the 5 MHz/n division, thus producing harmonic m of
the rational fraction m/n. In this manner, the thumb­
wheel switches set the desired output frequency.
The 5.315...MHz output signal is available as a test
signal at the SYNTHESIZER CHECK jack on the front
panel.
The preset divider is made up of four decades giving a
total dividing capability of 10,000. With each 10,000
counts applied to the divider input, there will be one
output pulse. With the addition of the preset capability
this divider can be set to divide by any integer (except
1 through 9, due to preset time). Since the divider can
be set to divide by any predetermined integer, the sys­
tem is considered a divide-by-n preset divider. For
example; if the divider were to divide-by-2, an 8 would
be preset into the decade before the counting sequence
starts, and since an 8 count is already in the decade from
the preset, it will take only 2 inputs to get 1 output.
Conversely, to divide-by-8, 2 counts are preset into the
decade prior to counting.
The preset divider delivers an " H " output to the sample
circuit starting at count 9991 and holding thru count
9999. During this time the input gate Q3 closes to pre­
vent 5 MHz pulse train from entering the decades
during preset. The preset number is determined by four
thumbwheel switches. At the same time that IC4
delivers an " H " output to the sample circuit it supplies
a preset pulse to the decades IC1(1), IC2(1), IC5(1), and
IC6(1). At the end of the preset period gate Q3 opens
and counting resumes until 9991 is obtained again.
Synthesizer Assembly Timing Diagram
ICK8)
IC3(8)-
IC40O)-
IC4(71-
o> O —
<0 O S OJ
O) 0> O
01 0» 0>
-TLTLTL
0 1 2 3
J-LTLTLrT-
PRESET DIVIDER COUNTING SEQUENCE (TW SET TO 0 0 0 0 )
The 5 MHz input signal is shaped by amplifier Q2. The
pulses are then applied to decade IC1(8). The decades
are connected in series. The sensing gate IC3 detects
when count reaches 9991 by sensing nines in IC2, 5, 6,
and a one in IC1. The IC3 output then triggers the one-
shot IC4. The duration of the one-shot output is approxi­
mately 1.8 Msec. During the 1.8 /isecs the decades are
preset by the pulse output of IC4(7). At the end of 1.8
sec the decades are preset and ready to resume coun­
ting. By sensing nine counts ahead, sufficient time is
available to preset the decades to any integer "n",
from 1 to 9990.
POWER SUPPLY CIRCUITS
A regulated +5 V supply, obtained from the +20 V
supply, is provided for the preset divider circuits.
Reference diode CR1 and regulator Q1 maintain a con­
stant +5 V supply to the preset divider.
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