HP 5065A Operating And Service Manual page 208

Model 5065A
Circuit Diagrams, Theory, and Maintenance
Prior to phase locking, the 5.315...MHz VCO (Q18 and
associated components) oscillates at about 5.315...MHz,
dependent on dc biasing by R71 and R72. Transistor
Q21 buffers the oscillator and drives Q22 and Q26. The
5.315...MHz signal at T2 primary is the input signal for
the sampler.
Transitors Q17, Q19, and associated components are a
trigger circuit driven by output pulses from preset
divider output gate IC5. This trigger circuit drives
sampler blocking oscillator Q20. Transformer T1 re­
ceives 80 nsec pulses from Q20 at the 5 MHz/n fre­
quency. These pulses "turn on" CR32 and CR33 each
time they occur. The 5.315...MHz signal also present
in T2 secondary is very close to the "mth" harmonic of
5 MHz/n. This "m" harmonic is sampled at the 5 MHz/n
rate, filtered by L7 and C34, and applied to varactor
diode CR27 to control oscillator frequency. Therefore,
the voltage level at CR27 cathode determines oscil­
lator frequency.
Buffer amplifier Q21 couples the Synthesizer frequency
to tuned amplifier Q26, improving signal purity. This
output connects to the front-panel SYNTHESIZER
CHECK jack for test purposes and to A3 Multiplier
Assembly for adding to the Multiplier 60 MHz signal.
The 5.315...MHz VCO phase lock range is kept narrow
to prevent phase locking to incorrect harmonics. To ac­
commodate the dynamic range required to complete
coverage of all UTC offset frequencies, the VCO has
two overlapping frequency ranges, selected by HI/LO
switch A1S2. Table 3-6 indicates the proper setting for ~
synthesizer frequencies.
Oscillator output amplitude is stabilized by the rectified _
output from diodes CR34 and CR35. This output if
filtered by C38 and C39. This AGC dc feedback con­
nects to oscillator Q18 base.
Transistor Q27 and associated components provide a
Synthesizer failure signal to Logic Assembly A14.
During normal Synthesizer operation, Q27 is biased
off and no output signal results. If the Synthesizer —
loses phase lock, Q23 input becomes a random ac signal
which can be observed at TP1. This signal is coupled
through C37 and Q24 base, amplified in Q24, Q25, and
rectified by CR36 and CR37. This rectified signal for- ~
ward biases CR38 and turns Q27 on to send a signal to
Logic Assembly A14. This turns off the CONTINUOUS
OPERATION light. If blocking oscillator Q20 fails, a __
signal through CR39 will turn on Q27 and apply the
same failure signal to the logic circuit.
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