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5
Routing guidlines for MIPI & LVDS
----------------------------------
D
1)All differential routes are required to have the same length between the positive (true) and the negative (complimentary) routes.
Spacing between the positive (true) and the negative (complimentary) shall be 2 times trace width.
2)Target differential impedance shall be 100 Ohms
3)Trace length matching to be within 1.0 mm (40 mil) across the entire bus.
4)Use small humps for skew corrections
5)Place signal vias close together and remove copper in between vias.
Traces to be fully shielded with GND stitching terminating at both trace end points
6)Board trace impedance results must be within ±10 percent of target and
Power plane impedance to be within +/- 10 percent of target at operating frequency
C
MIPI &LVDS Simulation Requirement
----------------------------------
1)MIPI Differential Mode insertion Loss shall be > -1.6dB at 750 MHz
2)MIPI Differential Mode Return Loss shall be < -15dB at 750 MHz
3)MIPI Common Mode Return Loss shall be < -15dB at 750 MHz
4)LVDS differential mode return loss shall be < -16.5db at 600 MHz
5)LVDS common mode return loss shall be < -16.5db at 600 MHz
B
6)LVDS insertion loss shall be > -1.7db at 600 MHz
7)LVDS Cross coupling shall be < -22 dB for victim IO at 600MHz
8)Power plane impedance to be within +/- 10 percent of target at operating frequency
A
5
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02018-1.0
4
4
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
3
3
Layout Guidelines
CrossLink LIF-MD6000 Master Link Board - Revision C
Evaluation Board User Guide
2
1
Lattice Semiconductor Applications
Lattice Semiconductor Applications
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Email: techsupport@Latticesemi.com
Email: techsupport@Latticesemi.com
Title
Title
Title
Layout Guidelines
Layout Guidelines
Layout Guidelines
Size
Size
Size
Project
Project
Project
B
B
B
CrossLink_Master_Multi-Link_Board
CrossLink_Master_Multi-Link_Board
CrossLink_Master_Multi-Link_Board
Date:
Date:
Date:
28-Mar-17
28-Mar-17
28-Mar-17
Sheet
Sheet
Sheet
2
1
D
C
B
A
Schematic Rev
Schematic Rev
Schematic Rev
1.0
1.0
1.0
Board Rev
Board Rev
Board Rev
1
1
1
8
8
8
of
of
of
8
8
8
27
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